AM79C973KCW datasheet(9/304 Pages) AMD

No. de pieza	AM79C973KCW

Descripción Electrónicos	PCnet??FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY

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Fabricante Electrónico	AMD [Advanced Micro Devices]

Página de inicio	http://www.amd.com

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9 / 304 page

Am79C973/Am79C975

9

P R E L I M INARY

CSR24: Base Address of Receive Ring Lower . . . . . . . . . . . . . . . . . . . . . . . . 141

CSR25: Base Address of Receive Ring Upper . . . . . . . . . . . . . . . . . . . . . . . . 141

CSR26: Next Receive Descriptor Address Lower . . . . . . . . . . . . . . . . . . . . . . 141

CSR27: Next Receive Descriptor Address Upper . . . . . . . . . . . . . . . . . . . . . . 141

CSR28: Current Receive Descriptor Address Lower . . . . . . . . . . . . . . . . . . . . 141

CSR29: Current Receive Descriptor Address Upper . . . . . . . . . . . . . . . . . . . . 141

CSR30: Base Address of Transmit Ring Lower . . . . . . . . . . . . . . . . . . . . . . . . 141

CSR31: Base Address of Transmit Ring Upper . . . . . . . . . . . . . . . . . . . . . . . . 142

CSR32: Next Transmit Descriptor Address Lower . . . . . . . . . . . . . . . . . . . . . . 142

CSR33: Next Transmit Descriptor Address Upper . . . . . . . . . . . . . . . . . . . . . . 142

CSR34: Current Transmit Descriptor Address Lower . . . . . . . . . . . . . . . . . . . 142

CSR35: Current Transmit Descriptor Address Upper . . . . . . . . . . . . . . . . . . . 142

CSR36: Next Next Receive Descriptor Address Lower . . . . . . . . . . . . . . . . . . 142

CSR37: Next Next Receive Descriptor Address Upper . . . . . . . . . . . . . . . . . . 142

CSR38: Next Next Transmit Descriptor Address Lower. . . . . . . . . . . . . . . . . . 143

CSR39: Next Next Transmit Descriptor Address Uper. . . . . . . . . . . . . . . . . . . 143

CSR40: Current Receive Byte Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

CSR41: Current Receive Status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

CSR42: Current Transmit Byte Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

CSR43: Current Transmit Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

CSR44: Next Receive Byte Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

CSR45: Next Receive Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

CSR46: Transmit Poll Time Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

CSR47: Transmit Polling Interval . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

CSR48: Receive Poll Time Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

CSR49: Receive Polling Interval . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

CSR58: Software Style. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

CSR60: Previous Transmit Descriptor Address Lower . . . . . . . . . . . . . . . . . . 147

CSR61: Previous Transmit Descriptor Address Upper . . . . . . . . . . . . . . . . . . 148

CSR62: Previous Transmit Byte Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

CSR63: Previous Transmit Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

CSR64: Next Transmit Buffer Address Lower . . . . . . . . . . . . . . . . . . . . . . . . . 148

CSR65: Next Transmit Buffer Address Upper . . . . . . . . . . . . . . . . . . . . . . . . . 148

CSR66: Next Transmit Byte Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

CSR67: Next Transmit Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

CSR72: Receive Ring Counter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

CSR74: Transmit Ring Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

CSR76: Receive Ring Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

CSR78: Transmit Ring Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

CSR80: DMA Transfer Counter and FIFO Threshold Control . . . . . . . . . . . . . 150

CSR82: Transmit Descriptor Address Pointer Lower . . . . . . . . . . . . . . . . . . . . 152

CSR84: DMA Address Register Lower . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

CSR85: DMA Address Register Upper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

CSR86: Buffer Byte Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

CSR88: Chip ID Register Lower. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

CSR89: Chip ID Register Upper. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153

CSR92: Ring Length Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153

CSR100: Bus Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153

CSR112: Missed Frame Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154

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