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ADS5287IRGCR Datasheet(PDF) 7 Page - Texas Instruments |
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ADS5287IRGCR Datasheet(HTML) 7 Page - Texas Instruments |
7 / 42 page 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 IN8 N IN8 P AVSS IN7 N IN7 P AVSS IN6 N IN6 P AVSS IN5 N IN5 P AVSS LVSS LVDD OUT8 N OUT8 P 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 IN1 P IN1 N AVSS IN2 P IN2 N AVSS IN3 P IN3 N AVSS IN4 P IN4 N LVSS PD LVSS OUT1 P OUT1 N 64 63 62 61 60 59 58 57 56 55 54 17 18 19 20 21 22 23 24 25 26 27 53 52 51 50 49 28 29 30 31 32 ADS5287 ADS5287 www.ti.com SBAS428D – JANUARY 2008 – REVISED JUNE 2012 PIN CONFIGURATION QFN-64 PowerPAD™ TOP VIEW Table 2. PIN DESCRIPTIONS: QFN-64 PIN NAME DESCRIPTION PIN NUMBER # OF PINS ADCLKN LVDS frame clock (1X)—negative output 24 1 ADCLKP LVDS frame clock (1X)—positive output 23 1 AVDD Analog power supply, 3.3V 49, 50, 57, 60 4 AVSS Analog ground 3, 6, 9, 37, 40, 43, 46 7 Negative differential clock input CLKN 59 1 Tie CLKN to 0V for a single-ended clock CLKP Positive differential clock input 58 1 CS Serial enable chip select—active low digital input 61 1 IN1N Negative differential input signal, channel 1 2 1 IN1P Positive differential input signal, channel 1 1 1 IN2N Negative differential input signal, channel 2 5 1 IN2P Positive differential input signal, channel 2 4 1 IN3N Negative differential input signal, channel 3 8 1 IN3P Positive differential input signal, channel 3 7 1 IN4N Negative differential input signal, channel 4 11 1 IN4P Positive differential input signal, channel 4 10 1 Copyright © 2008–2012, Texas Instruments Incorporated 7 |
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