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STA333BW Datasheet(PDF) 3 Page - STMicroelectronics

No. de pieza STA333BW
Descripción Electrónicos  2.1-channel 40-watt high-efficiency digital audio system
Download  68 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA333BW Datasheet(HTML) 3 Page - STMicroelectronics

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DocID13773 Rev 4
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STA333BW
Contents
68
6.4.2
Current address multi-byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.4.3
Random address byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.4.4
Random address multi-byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7
Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1
Configuration registers (addr 0x00 to 0x05) . . . . . . . . . . . . . . . . . . . . . . . 21
7.1.1
Configuration register A (addr 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1.2
Configuration register B (addr 0x01) . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1.3
Configuration register C (addr 0x02) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.1.4
Configuration register D (addr 0x03) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.1.5
Configuration register E (addr 0x04) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.1.6
Configuration register F (addr 0x05) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.2
Volume control registers (addr 0x06 - 0x0A) . . . . . . . . . . . . . . . . . . . . . . 39
7.2.1
Mute / line output configuration register (addr 0x06) . . . . . . . . . . . . . . . 40
7.2.2
Master volume register (addr 0x07) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.3
Channel 1 volume (addr 0x08) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.4
Channel 2 volume (addr 0x09) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.5
Channel 3 / line output volume (addr 0x0A) . . . . . . . . . . . . . . . . . . . . . 41
7.3
Audio preset registers (addr 0x0B and 0x0C) . . . . . . . . . . . . . . . . . . . . . 42
7.3.1
Audio preset register 1 (addr 0x0B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.3.2
Audio preset register 2 (addr 0x0C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.4
Channel configuration registers (addr 0x0E - 0x10) . . . . . . . . . . . . . . . . . 44
7.5
Tone control register (addr 0x11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.6
Dynamic control registers (addr 0x12 - 0x15) . . . . . . . . . . . . . . . . . . . . . 46
7.6.1
Limiter 1 attack / release rate (addr 0x12) . . . . . . . . . . . . . . . . . . . . . . . 46
7.6.2
Limiter 1 attack / release threshold (addr 0x13) . . . . . . . . . . . . . . . . . . 46
7.6.3
Limiter 2 attack / release rate (addr 0x14) . . . . . . . . . . . . . . . . . . . . . . . 47
7.6.4
Limiter 2 attack / release threshold (addr 0x15) . . . . . . . . . . . . . . . . . . 47
7.6.5
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
7.7
User-defined coefficient control registers (addr 0x16 - 0x26) . . . . . . . . . . 52
7.7.1
Coefficient address register (addr 0x16) . . . . . . . . . . . . . . . . . . . . . . . . 52
7.7.2
Coefficient b1 data register bits (addr 0x17 - 0x19) . . . . . . . . . . . . . . . . 52
7.7.3
Coefficient b2 data register bits (addr 0x1A - 0x1C) . . . . . . . . . . . . . . . 52
7.7.4
Coefficient a1 data register bits (addr 0x1D - 0x1F) . . . . . . . . . . . . . . . 52
7.7.5
Coefficient a2 data register bits (addr 0x20 - 0x22) . . . . . . . . . . . . . . . . 53
7.7.6
Coefficient b0 data register bits (addr 0x23 - 0x25) . . . . . . . . . . . . . . . . 53


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