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AT90S2323 Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT90S2323 Datasheet(HTML) 3 Page - ATMEL Corporation |
3 / 64 page 3 AT90S/LS2323/2343 1004D–09/01 Figure 2. The AT90S/LS2323 Block Diagram The AT90S2323/2343 provides the following features: 2K bytes of In-System Program- mabl e F lash, 128 bytes EEPROM, 128 bytes SRAM, 3 (A T90S/L S2323)/5 (AT90S/LS2343) general-purpose I/O lines, 32 general-purpose working registers, an 8- bit timer/counter, internal and external interrupts, programmable Watchdog Timer with internal oscillator, an SPI serial port for Flash Memory downloading and two software- selectable power-saving modes. The Idle mode stops the CPU while allowing the SRAM, timer/counters, SPI port and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On-chip Flash allows the program memory to be reprogrammed in-system through an SPI serial interface. By combining an 8-bit RISC CPU with ISP Flash on a monolithic PROGRAM COUNTER INTERNAL OSCILLATOR WATCHDOG TIMER STACK POINTER PROGRAM FLASH MCU CONTROL REGISTER SRAM GENERAL PURPOSE REGISTERS INSTRUCTION REGISTER TIMER/ COUNTER INSTRUCTION DECODER DATA DIR. REG. PORTB DATA REGISTER PORTB PROGRAMMING LOGIC TIMING AND CONTROL OSCILLATOR INTERRUPT UNIT EEPROM SPI STATUS REGISTER Z Y X ALU PORTB DRIVERS PB0 - PB2 RESET VCC GND CONTROL LINES 8-BIT DATA BUS |
Número de pieza similar - AT90S2323 |
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Descripción similar - AT90S2323 |
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