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ABSOLUTE MAXIMUM RATINGS

DISSIPATION RATINGS TABLE

TPS793xx

SLVS348K – JULY 2001 – REVISED OCTOBER 2007

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PRODUCT

(2)

TPS793xxyyyz

XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).

YYY is package designator.

Z is package quantity.

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2)

Output voltages from 1.2V to 4.8V in 50mV increments are available; minimum order quantities may apply. Contact factory for details

and availability.

Over operating temperature range (unless otherwise noted)

(1)

UNIT

–0.3V to 6V

–0.3V to 6V

–0.3V to 6V

Peak output current

Internally limited

ESD rating, HBM

2kV

ESD rating, CDM

500V

Continuous total power dissipation

See Dissipation Ratings Table

Junction temperature range, DBV package

–40

°C to +150°C

Junction temperature range, YEQ package

–40

°C to +125°C

–65

°C to +150°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DERATING FACTOR

POWER

POWER

POWER

BOARD

PACKAGE

RATING

RATING

RATING

DBV

65

°C/W

255

°C/W

3.9mW/

°C

390mW

215mW

155mW

DBV

65

°C/W

180

°C/W

5.6mW/

°C

560mW

310mW

225mW

YEQ

27

°C/W

255

°C/W

3.9mW/

°C

390mW

215mW

155mW

YEQ

27

°C/W

190

°C/W

5.3mW/

°C

530mW

296mW

216mW

(1)

The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top

of the board.

(2)

The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and

ground planes and 2 ounce copper traces on top and bottom of the board.

2

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