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AD5684BCPZ-RL7 Datasheet(PDF) 4 Page - Analog Devices

No. de pieza AD5684BCPZ-RL7
Descripción Electrónicos  Quad, 16-/12-Bit nanoDAC with SPI Interface
Download  28 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD5684BCPZ-RL7 Datasheet(HTML) 4 Page - Analog Devices

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AD5686/AD5684
Data Sheet
Rev. A | Page 4 of 28
A Grade1
B Grade1
Parameter
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions/Comments
LOGIC INPUTS3
Input Current
±2
±2
µA
Per pin
Input Low Voltage (VINL)
0.3 × VLOGIC
0.3 × VLOGIC
V
Input High Voltage (VINH)
0.7 × VLOGIC
0.7 × VLOGIC
V
Pin Capacitance
2
2
pF
LOGIC OUTPUTS (SDO)3
Output Low Voltage, VOL
0.4
0.4
V
ISINK = 200 μA
Output High Voltage, VOH
VLOGIC − 0.4
VLOGIC − 0.4
V
ISOURCE = 200 μA
Floating State Output
Capacitance
4
4
pF
POWER REQUIREMENTS
VLOGIC
1.8
5.5
1.8
5.5
V
ILOGIC
3
3
µA
VDD
2.7
5.5
2.7
5.5
V
Gain = 1
VREF + 1.5
5.5
VREF + 1.5
5.5
V
Gain = 2
IDD
VIH = VDD, VIL = GND, VDD = 2.7 V to 5.5 V
Normal Mode7
0.59
0.7
0.59
0.7
mA
All Power-Down Modes8
1
4
1
4
µA
−40°C to +85°C
6
6
µA
−40°C to +105°C
1
Temperature range, A and B grade: −40°C to +105°C.
2
DC specifications tested with the outputs unloaded, unless otherwise noted. Upper dead band = 10 mV and exists only when VREF = VDD with gain = 1 or when VREF/2 =
VDD with gain = 2. Linearity calculated using a reduced code range of 256 to 65,280 (AD5686) or 12 to 4080 (AD5684).
3
Guaranteed by design and characterization; not production tested.
4
Channel A and Channel B can have a combined output current of up to 30 mA. Similarly, Channel C and Channel D can have a combined output current of up to
30 mA up to a junction temperature of 110°C.
5
VDD = 5 V. The device includes current limiting that is intended to protect the device during temporary overload conditions. Junction temperature can be exceeded
during current limit. Operation above the specified maximum operation junction temperature may impair device reliability.
6
When drawing a load current at either rail, the output voltage headroom with respect to that rail is limited by the 25
Ω typical channel resistance of the output
devices. For example, when sinking 1 mA, the minimum output voltage = 25 Ω × 1 mA = 25 mV (see Figure 23).
7
Interface inactive. All DACs active. DAC outputs unloaded.
8
All DACs powered down.


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