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CAT28HT256D-25 Datasheet(PDF) 1 Page - Catalyst Semiconductor |
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CAT28HT256D-25 Datasheet(HTML) 1 Page - Catalyst Semiconductor |
1 / 10 page 8-91 CAT28HT256 256K-Bit CMOS PARALLEL E2PROM FEATURES s Fast Read Access Times: 200/250 ns s Low Power CMOS Dissipation: –Active: 30 mA Max. –Standby: 150 µA Max. s Simple Write Operation: –On-Chip Address and Data Latches –Self-Timed Write Cycle with Auto-Clear s Fast Write Cycle Time: –10ms Max s CMOS and TTL Compatible I/O s Automatic Page Write Operation: –1 to 64 Bytes in 10ms –Page Load Timer s End of Write Detection: –Toggle Bit – DATA DATA DATA DATA DATA Polling s Hardware and Software Write Protection s 100,000 Program/Erase Cycles s 100 Year Data Retention DESCRIPTION The CAT28HT256 is a fast, low power, 5V-only CMOS parallel E2PROM organized as 32K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with auto-clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bits signal the start and end of the self-timed write cycle. Additionally, the CAT28HT256 features hardware and software write protection as well as an internal Error Correction Code (ECC) for extremely high reliability. The CAT28HT256 is manufactured using Catalyst’s advanced CMOS floating gate technology. It is designed to endure 100,000 program/erase cycles and has a data retention of 100 years. The device is available in JEDEC approved 28-pin Ceramic DIP package. BLOCK DIAGRAM 5096 FHD F02 © 1998 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Advanced Extended Temperature: 170˚C ADDR. BUFFER & LATCHES ADDR. BUFFER & LATCHES INADVERTENT WRITE PROTECTION CONTROL LOGIC TIMER ROW DECODER COLUMN DECODER HIGH VOLTAGE GENERATOR A6–A14 CE OE WE A0–A5 I/O0–I/O7 I/O BUFFERS 32,768 x 8 E2PROM ARRAY 64 BYTE PAGE REGISTER VCC DATA POLLING AND TOGGLE BIT |
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