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ADP1706ACPZ-10-R7 Datasheet(PDF) 11 Page - Analog Devices

No. de pieza ADP1706ACPZ-10-R7
Descripción Electrónicos  1 A, Low Dropout, CMOS Linear Regulator
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADP1706ACPZ-10-R7 Datasheet(HTML) 11 Page - Analog Devices

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ADP1706/ADP1707/ADP1708
Rev. 0 | Page 11 of 20
VTRK (V)
ADJUSTABLE OUTPUT VOLTAGE (ADP1708)
The ADP1708 can have its output voltage set over a 0.8 V to
5.0 V range. The output voltage is set by connecting a resistive
voltage divider from OUT to ADJ. The output voltage is
calculated by
VOUT = 0.8 V (1 + R1/R2)
(2)
where:
R1 is the resistor from OUT to ADJ.
R2 is the resistor from ADJ to GND.
The maximum bias current into ADJ is 100 nA, so for less
than 0.5% error due to the bias current, use values less than
60 kΩ for R2.
TRACK MODE (ADP1707)
The ADP1707 includes a tracking mode feature. As shown in
Figure 30, if the voltage applied at the TRK pin is less than the
nominal output voltage, OUT is equal to the voltage at TRK.
Otherwise, OUT regulates to its nominal output value.
4.0
0
05.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VIN = 3.8V
VOUT = 3.3V
ILOAD = 10mA
Figure 30. ADP1707 Output Voltage vs. Tracking Voltage
For example, consider an ADP1707 with a nominal output
voltage of 3.3 V. If the voltage applied to its TRK pin is greater
than 3.3 V, OUT maintains a nominal output voltage of 3.3 V.
If the voltage applied to TRK is reduced below 3.3 V, OUT
tracks this voltage. OUT can track the TRK pin voltage from
the nominal value all the way down to 0 V. A voltage divider is
present from TRK to the error amplifier input with a divider
ratio equal to the divider from OUT to the error amplifier,
which sets the output voltage equal to the tracking voltage.
Both divider ratios are set by postpackage trim, depending on
the desired output voltage.
ENABLE FEATURE
The ADP1706/ADP1707/ADP1708 use the EN pin to enable
and disable the OUT pin under normal operating conditions.
As shown in Figure 31, when a rising voltage on EN crosses the
active threshold, OUT turns on. When a falling voltage on EN
crosses the inactive threshold, OUT turns off.
TIME (10ms/DIV)
VIN = 5V
VOUT = 1.6V
COUT = 4.7μF
ILOAD = 10mA
EN
OUT
Figure 31. ADP1706 Typical EN Pin Operation
As shown in Figure 31, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the IN
voltage. Therefore, these thresholds vary when changing the
input voltage. Figure 32 shows typical EN active/inactive
thresholds when the input voltage varies from 2.5 V to 5.5 V.
1.4
0.5
2.50
5.50
VIN (V)
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
EN ACTIVE
2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25
EN INACTIVE
HYSTERESIS
Figure 32. Typical EN Pin Thresholds vs. Input Voltage


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