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LMH6553SDNOPB Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza LMH6553SDNOPB
Descripción Electrónicos  LMH6553 900 MHz Fully Differential Amplifier With Output Limiting Clamp
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMH6553SDNOPB Datasheet(HTML) 3 Page - National Semiconductor (TI)

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LMH6553
www.ti.com
SNOSB07H – SEPTEMBER 2008 – REVISED MARCH 2013
VS = ±5V Electrical Characteristics
(1)
Unless otherwise specified, all limits are ensured for TA = 25°C, VS = ±5V, AV = 1, VCM = 0V, VCLAMP = 3V, RF = RG = 275Ω,
RL = 200Ω, for single-ended in, differential out. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min (2)
Typ (3)
Max (2)
Units
AC Performance (Differential)
SSBW
Small Signal
−3 dB Bandwidth (2)
VOUT = 0.2 VPP, AV = 1, RL = 1 kΩ
900
VOUT = 0.2 VPP, AV = 1
720
VOUT = 0.2 VPP, AV = 2
680
MHz
VOUT = 0.2 VPP, AV = 4
630
VOUT = 0.2 VPP, AV = 8, (RF = 400Ω, RG =
350
50
Ω)
LSBW
Large Signal
−3 dB Bandwidth
VOUT = 2 VPP, AV = 1, RL = 1 kΩ
670
VOUT = 2 VPP, AV = 1
540
VOUT = 2 VPP, AV = 2
530
MHz
VOUT = 2 VPP, AV = 4
490
VOUT = 2 VPP, AV = 8, (RF = 400Ω, RG = 50Ω)
350
0.1 dB Bandwidth
VOUT = 0.2 VPP, AV = 1
50
MHz
0.5 dB Bandwidth
VOUT = 0.2 VPP, AV = 1
525
MHz
Slew Rate
4V Step, AV = 1
2300
V/
μs
Rise/Fall Time, 10%-90%
2V Step
690
ps
0.1% Settling Time
2V Step
10
ns
1.0% Settling Time
2V Step
6
ns
Distortion and Noise Response
HD2
2nd Harmonic Distortion
VOUT = 2 VPP, f = 20 MHz, RL = 800Ω
−79
dBc
VOUT = 2 VPP, f = 70 MHz, RL = 800Ω
−78
HD3
3rd Harmonic Distortion
VOUT = 2 VPP, f = 20 MHz, RL = 800Ω
−90
dBc
VOUT = 2 VPP, f = 70 MHz, RL = 800Ω
−71
IMD3
3rd-Order Two-Tone
fc = 20 MHz, , VOUT = 2 VPP Composite,
−92
Intermodulation
RL = 200Ω
dBc
fc = 150 MHz, , VOUT = 2 VPP Composite,
−76
RL = 200Ω
Input Noise Voltage
f = 100 kHz
1.2
nV/
√Hz
Input Noise Current
f = 100 kHz
13.6
pA/
√Hz
Noise Figure (See Figure 58)
50
Ω System, AV = 9, 10 MHz
10.3
dB
Input Characteristics
IBI
Input Bias Current (4)
−95
50
95
µA
IBoffset
Input Bias Current Differential (3)
VCM = 0V, VID = 0V, IBoffset = (IB- IB+)/2
−18
2.5
18
µA
CMRR
Common Mode Rejection Ratio (3)
DC, VCM = 0V, VID = 0V
82
dBc
RIN
Input Resistance
Differential
15
CIN
Input Capacitance
Differential
0.5
pF
CMVR
Input Common Mode Voltage
CMRR > 38 dB
±3.3
±3.6
V
Range
(1)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. See Application Information for information on temperature de-rating of this device."
Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted.
(2)
Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using
Statistical Quality Control (SQC) methods.
(3)
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(4)
Exceeding limits could result in excessive device current.
Copyright © 2008–2013, Texas Instruments Incorporated
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