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PI2EQX3201BL Datasheet(PDF) 4 Page - Pericom Semiconductor Corporation |
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PI2EQX3201BL Datasheet(HTML) 4 Page - Pericom Semiconductor Corporation |
4 / 5 page 4 Altera Corporation MAX 7000A Programmable Logic Device Data Sheet The MAX 7000A architecture supports 100% transistor-to-transistor logic (TTL) emulation and high-density integration of SSI, MSI, and LSI logic functions. It easily integrates multiple devices including PALs, GALs, and 22V10s devices. MAX 7000A devices are available in a wide range of packages, including PLCC, BGA, FineLine BGA, Ultra FineLine BGA, PQFP, and TQFP packages. See Table 3 and Table 4. Notes to tables: (1) When the IEEE Std. 1149.1 (JTAG) interface is used for in-system programming or boundary-scan testing, four I/O pins become JTAG pins. (2) All Ultra FineLine BGA packages are footprint-compatible via the SameFrameTM feature. Therefore, designers can design a board to support a variety of devices, providing a flexible migration path across densities and pin counts. Device migration is fully supported by Altera development tools. See “SameFrame Pin-Outs” on page 15 for more details. (3) All FineLine BGA packages are footprint-compatible via the SameFrame feature. Therefore, designers can design a board to support a variety of devices, providing a flexible migration path across densities and pin counts. Device migration is fully supported by Altera development tools. See “SameFrame Pin-Outs” on page 15 for more details. Table 3. MAX 7000A Maximum User I/O Pins Note (1) Device 44-Pin PLCC 44-Pin TQFP 49-Pin Ultra FineLine BGA (2) 84-Pin PLCC 100-Pin TQFP 100-Pin FineLine BGA (3) EPM7032AE 36 36 EPM7064AE 36 36 41 68 68 EPM7128A 68 84 84 EPM7128AE 68 84 84 EPM7256A 84 EPM7256AE 84 84 EPM7512AE Table 4. MAX 7000A Maximum User I/O Pins Note (1) Device 144-Pin TQFP 169-Pin Ultra FineLine BGA (2) 208-Pin PQFP 256-Pin BGA 256-Pin FineLine BGA (3) EPM7032AE EPM7064AE EPM7128A 100 100 EPM7128AE 100 100 100 EPM7256A 120 164 164 EPM7256AE 120 164 164 EPM7512AE 120 176 212 212 |
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