ADS5560IRGZR datasheet(3/56 Pages) TI1

No. de pieza	ADS5560IRGZR

Descripción Electrónicos	16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS

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Fabricante Electrónico	TI1 [Texas Instruments]

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ADS5560

ADS5562

www.ti.com

SLWS207A – MAY 2008 – REVISED MAY 2012

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range (unless otherwise noted)

VALUE

UNIT

AVDD

Supply voltage range

–0.3 V to 3.9

V

DRVDD Supply voltage range

–0.3 V to 3.9

V

Voltage between AGND and DRGND

-0.3 to 0.3

V

Voltage between AVDD and DRVDD

-0.3 to 3.3

V

Voltage applied to VCM pin (in external reference mode)

-0.3 to 1.8

V

Voltage applied to

INP, INM

–0.3 V to minimum (3.6, AVDD + 0.3 V)

V

analog input pins

CLKP, CLKM(2), MODE

RESET, SCLK, SDATA, SEN, OE, DFS

-0.3V to minimum (3.6, DRVDD+0.3V)

V

TA

Operating free-air temperature range

–40 to 85

°C

Tjmax

Operating junction temperature range

125

°C

TSTG

Storage temperature range

–65 to 150

°C

Lead temperature 1,6 mm (1/16") from the case for 10 seconds

220

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

(2)

When AVDD is turned off, it is recommended to switch off the input clock (or ensure the voltage on CLKP, CLKM is <|0.3V|). This

prevents the ESD protection diodes at the clock input pins from turning on.

THERMAL INFORMATION

ADS5560,

ADS5562

THERMAL METRIC(1)

UNITS

QFN-48 RGZ

θJA

Junction-to-ambient thermal resistance(2)

27.6

θJCtop

Junction-to-case (top) thermal resistance(3)

12.4

θJB

Junction-to-board thermal resistance(4)

4.4

°C/W

ψJT

Junction-to-top characterization parameter(5)

0.2

ψJB

Junction-to-board characterization parameter(6)

4.4

θJCbot

Junction-to-case (bottom) thermal resistance(7)

0.9

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter,

ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA , using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

TYP

MAX

UNIT

SUPPLIES AND REFERENCES

AVDD

Analog supply voltage

3

3.3

3.6

V

DRVDD

Digital supply voltage

3

3.3

3.6

V

ANALOG INPUTS

Differential input voltage range (with default fine gain=1 dB)

3.56

VPP

Input common-mode voltage

1.5 ±0.1

V

Voltage applied on VCM in external reference mode

1.5 ±0.05

V

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