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HCPL0531 Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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HCPL0531 Datasheet(HTML) 5 Page - Fairchild Semiconductor |
5 / 12 page ©2003 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL0XXX Rev. 1.0.4 5 Notes 1 Current Transfer Ratio is designed as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. The 4.1 k Ω load represents 1 LSTTL unit load of 0.36 mA and 6.1kΩ pull-up resistor. 3. The 1.9 k Ω load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor. 4. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V). 5. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. 6. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration. |
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