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LM4992SDBD Datasheet(PDF) 6 Page - Texas Instruments |
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LM4992SDBD Datasheet(HTML) 6 Page - Texas Instruments |
6 / 23 page 1 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 NC V OUT- V OUT+ NC V IN+ V IN- PD 140 V OCM 50 50 GS+ GS- Unused Unused 200 60 2 140 200 60 2 - - + + V OCM THS770012 SLOS669C – FEBRUARY 2010 – REVISED JANUARY 2012 www.ti.com PIN CONFIGURATION RGE PACKAGE VQFN-24 (TOP VIEW) PIN DESCRIPTIONS PIN DESCRIPTION NO. NAME 1 NC No internal connection 2 PD Power down. High = low power (sleep) mode. Low = active. 3 VIN– Inverting input pin 4 VIN+ Non-inverting input pin 5 VOCM Output common-mode voltage control input pin 6, 7 NC No internal connection 8, 9, 10, 11 GND Ground. Must be connected to thermal pad. 12 NC No internal connection 13 GS- Gain-setting connection for inverting output 14 Unused Bonded to die, but not used. Tie to GND. 15 VOUT– Inverting output pin 16 VOUT+ Non-inverting output pin 17 Unused Bonded to die, but not used. Tie to GND. 18 GS+ Gain-setting connection for non-inverting output 19 NC No internal connection 20, 21, 22, VS+ Power supply pins, +5V nominal 23 24 NC No internal connection Thermal pad Thermal pad on bottom of device is used for heat dissipation and must be tied to GND 6 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): THS770012 |
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