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ADC12DC080 Datasheet(PDF) 1 Page - Texas Instruments |
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ADC12DC080 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 27 page 12-Bit Pipelined ADC Core Output Buffers Reference A Reference B Timing Generation VINA 2 12 12 DA0-DA11 CHANNEL A 12-Bit Pipelined ADC Core Output Buffers VINB 2 12 DB0-DB11 CHANNEL B DRDY CLK VREF Ref.Decoupling Ref.Decoupling 3 3 12 ADC12DC080 www.ti.com SNAS405B – SEPTEMBER 2007 – REVISED NOVEMBER 2008 ADC12DC080 Dual 12-Bit, 80 MSPS A/D Converter with CMOS Outputs Check for Samples: ADC12DC080 1 FEATURES DESCRIPTION The ADC12DC080 is a high-performance CMOS 2 • Internal Sample-and-Hold Circuit and Precision analog-to-digital converter capable of converting two Reference analog input signals into 12-bit digital words at rates • Low Power Consumption up to 80 Mega Sample Per Second (MSPS). These • Clock Duty Cycle Stabilizer converters uses a differential, pipelined architecture with digital error correction and an on-chip sample- • Single +3.0V Supply Operation and-hold circuit to minimize power consumption and • Power-Down Mode the external component count, while providing • Offset Binary or 2's Complement Output Data excellent dynamic performance. A unique sample- Format and-hold stage yields a full-power bandwidth of 1 GHz. The ADC12DC080 may be operated from a • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm single +3.0V power supply. A power-down feature Pin-Pitch) reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. APPLICATIONS The differential inputs provide a 2V full scale differential input swing. A stable 1.2V internal voltage • High IF Sampling Receivers reference is provided, or the ADC12DC080 can be • Wireless Base Station Receivers operated with an external 1.2V reference. Output • Test and Measurement Equipment data format (offset binary versus 2's complement) • Communications Instrumentation and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide • Portable Instrumentation range of clock duty cycles. KEY SPECIFICATIONS The ADC12DC080 is available in a 60-lead WQFN package and operates over the industrial temperature • Resolution 12 Bits range of −40°C to +85°C. • Conversion Rate 80 MSPS • SNR (fIN = 170 MHz) 69.5 dBFS (typ) • SFDR (fIN = 170 MHz) 83 dBFS (typ) • Full Power Bandwidth 1 GHz (typ) • Power Consumption 600 mW (typ) Block Diagram 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2007–2008, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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