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ADC161S626 Datasheet(PDF) 6 Page - Texas Instruments |
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ADC161S626 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 30 page ADC161S626 SNAS468B – SEPTEMBER 2008 – REVISED MAY 2009 www.ti.com ADC161S626 Converter Electrical Characteristics (1) (continued) The following specifications apply for VA = 4.5V to 5.5V, VIO = 2.7V to 5.5V, and VREF = 2.5V to 5.5V for fSCLK = 1 MHz to 4 MHz or VREF = 4.5V to 5.5V for fSCLK = 1 MHz to 5 MHz; fIN = 20 kHz, and CL = 25 pF, unless otherwise noted. Maximum and minimum values apply for TA = TMIN to TMAX; the typical values are tested at TA = 25°C. Symbol Parameter Conditions Min Typ Max Units ISOURCE = 200 µA 0.01 0.4 V VOL Output Low Voltage ISOURCE = 1 mA 0.07 V IOZH, IOZL TRI-STATE Leakage Current Force 0V or VA ±1 µA COUT TRI-STATE Output Capacitance Force 0V or VA 4 pF Output Coding Binary 2'S Complement POWER SUPPLY CHARACTERISTICS VA Analog Supply Voltage Range 4.5 5 5.5 V Digital Input/Output Supply Voltage VIO (2) 2.7 3 5.5 V Range VREF Reference Voltage Range 0.5 5 VA V VA = 5V, fSCLK = 4 MHz, fS = 200 1060 µA kSPS Analog Supply Current, Conversion IVA (Conv) Mode VA = 5V, fSCLK = 5 MHz, fS = 250 1160 1340 µA kSPS VIO = 3V, fSCLK = 4 MHz, fS = 200 80 µA kSPS Digital I/O Supply Current, Conversion IVIO (Conv) Mode VIO = 3V, fSCLK = 5 MHz, fS = 250 100 µA kSPS VA = 5V, fSCLK = 4 MHz, fS = 200 80 µA kSPS IVREF Reference Current, Conversion Mode (Conv) VA = 5V, fSCLK = 5 MHz, fS = 250 100 170 µA kSPS fSCLK = 5 MHz, VA = 5V 7 µA Analog Supply Current, Power Down IVA (PD) Mode (CS high) fSCLK = 0 Hz, VA = 5V (3) 2 3 µA fSCLK = 5 MHz, VIO = 3V 1 µA Digital I/O Supply Current, Power Down IVIO (PD) Mode (CS high) fSCLK = 0 Hz, VIO = 3V (3) 0.3 0.5 µA fSCLK = 5 MHz, VREF = 5V 0.5 µA Reference Current, Power Down Mode IVREF (PD) (CS high) fSCLK = 0 Hz, VREF = 5V (3) 0.5 0.7 µA VA = 5V, fSCLK = 4 MHz, fS = 200 5.3 mW kSPS, and fIN = 20 kHz, PWR Power Consumption, Conversion Mode (Conv) VA = 5V, fSCLK = 5 MHz, fS = 250 5.8 6.7 mW kSPS, and fIN = 20 fSCLK = 5 MHz, VA = 5.0V 35 µW (3) Power Consumption, Power Down Mode PWR (PD) (CS high) fSCLK = 0 Hz, VA = 5.0V 10 15 µW (3) See the Specification Definitions for PSRR Power Supply Rejection Ratio −78 dB the test condition AC ELECTRICAL CHARACTERISTICS fSCLK Maximum Clock Frequency 1 5 MHz fS Maximum Sample Rate (4) 50 250 kSPS tACQ Acquisition/Track Time 600 ns SCLK tCONV Conversion/Hold Time 17 cycles tAD Aperture Delay See the Specification Definitions 6 ns (2) The value of VIO is independent of the value of VA. For example, VIO could be operating at 5.5V while VA is operating at 4.5V or VIO could be operating at 2.7V while VA is operating at 5.5V. (3) This parameter is guaranteed by design and/or characterization and is not tested in production. (4) While the maximum sample rate is fSCLK / 20, the actual sample rate may be lower than this by having the CS rate slower than fSCLK / 20. 6 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Links: ADC161S626 |
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