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TPA6133A2 Datasheet(PDF) 3 Page - Texas Instruments |
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TPA6133A2 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 19 page 1 2 3 4 5 6 7 8 9 10 15 14 13 12 11 20 19 18 17 16 Top View LEFTINM LEFTINP GND RIGHTINP RIGHTINM HPRIGHT VDD GND HPLEFT CPVSS Top View QFN Package (RTJ) TPA6133A2 www.ti.com SLOS821 – JUNE 2013 RJT PACKAGE (Top VIEW) PIN FUNCTIONS PIN INPUT, OUTPUT, DESCRIPTION NAME PIN QFN POWER Charge pump voltage supply. VDD must be connected to the common VDD voltage VDD 20 P supply. Decouple to GND (pin 19 ) with its own 1 μF capacitor. Charge pump ground. GND must be connected to common supply GND. It is GND 19 P recommended that this pin be decoupled to the VDD of the charge pump pin (pin 20 on the QFN). Charge pump flying capacitor positive terminal. Connect one side of the flying capacitor CPP 18 P to CPP. Charge pump flying capacitor negative terminal. Connect one side of the flying CPN 17 P capacitor to CPN. Left channel negative differential input. Impedance must be matched to LEFTINP. LEFTINM 1 I Connect the left input to LEFTINM when using single-ended inputs. Left channel positive differential input. Impedance must be matched to LEFTINM. AC LEFTINP 2 I ground LEFTINP near signal source while maintaining matched impedance to LEFTINM when using single-ended inputs. Negative supply generated by the charge pump. Decouple to pin 19 or a GND plane. CPVSS 15, 16 P Use a 1 μF capacitor. HPLEFT 14 O Headphone left channel output. Connect to left terminal of headphone jack. Right channel negative differential input. Impedance must be matched to RIGHTINP. RIGHTINM 5 I Connect the right input to RIGHTINM when using single-ended inputs. Right channel positive differential input. Impedance must be matched to RIGHTINM. RIGHTINP 4 I AC ground RIGHTINP near signal source while maintaining matched impedance to RIGHTINM when using single-ended inputs. Analog ground. Must be connected to common supply GND. It is recommended that GND 3, 9, 10, 13 P this pin be used to decouple VDD for analog. Use pin 13 to decouple pin 12 on the QFN package. Analog VDD. VDD must be connected to common VDD supply. Decouple with its own 1- VDD 12 P μF capacitor to analog ground (pin 13). SD 6 I Shutdown. Active low logic. 5V tolerant input. Copyright © 2013, Texas Instruments Incorporated 3 Product Folder Links: TPA6133A2 |
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