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LMP92018SQXNOPB Datasheet(PDF) 6 Page - Texas Instruments |
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LMP92018SQXNOPB Datasheet(HTML) 6 Page - Texas Instruments |
6 / 34 page LMP92018 SNAS514B – NOVEMBER 2011 – REVISED MAY 2013 www.ti.com Operating Conditions (1) (2) Operating Ambient Temperature −40°C to 125°C VDD Voltage Range 4.75V to 5.25V VIO Voltage Range 1.8V to VDD VGPIO Voltage Range 1.8V to VDD DAC Output Load C 0nF to 1nF θJA 25.2°C/W θJC 2.4°C/W (1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. (2) All voltages are measured with respect to GND = 0V, unless otherwise specified. Electrical Characteristics Unless otherwise noted, these specifications apply for VDD=4.75V to 5.25V, REF=VDD, TA=25°C. Boldface limits are over the temperature range of −30°C ≤ TA ≤ 85°C unless otherwise noted. DAC input code range 12 to 1012. DAC output CL = 200 pF unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units ADC CHARACTERISTICS Resolution with No Missing 10 10 Bits Codes DNL Differential Non-Linearity −0.9 +1 INL Integral Non-Linearity −1 1 LSB OE Offset Error −2 +2 OEDRIFT Offset Error Temperature Drift 0.001 LSB/°C OEMTCH Offset Error Match(1) −1 1 LSB GE Gain Error −2 2 GEDRIFT Gain Error Temperature Drift 0.001 LSB/°C GEMTCH Gain Error Match(1) −1 1 LSB SINAD Signal-to-Noise Ratio 10 kHz Sine Wave 58 dB THD Total Harmonic Distortion 10 kHz Sine Wave, up to 5th harmonic −69 SFDR Spurious Free Dynamic Range 10 kHz Sine Wave 70 dBc Offset Error change with VDD −150 PSRR Power Supply Rejection Ratio dB Gain Error change with VDD −150 DAC CHARACTERISTICS Resolution 10 10 Bits Monotonicity 10 Bits DNL Differential Non-Linearity RL = 100k −0.5 +0.5 LSB INL Integral Non-Linearity RL = 100k −2 +2 OE Offset Error(2) RL = 100k 10 mV OEDRIFT Offset Error Temperature Drift RL = 100k 1 µV/°C VDD = 5.25V, REF=5, RL = 100k, FSE Full-Scale Error -0.4 +0.3 CODE=3FFh %FS GE Gain Error(3) RL = 100k −0.2 +0.2 GEDRIFT Gain Error Temperature Drift RL = 100k 1.4 ppm/° C IOUT = 200 µA 7 ZCO Zero Code Output mV IOUT = 1mA 31 (1) Device Specification is guaranteed by characterization and is not tested in production. (2) DAC Offset is the y-intercept of the straight line defined by DAC output at code 0d12 and 0d1011points of the measured transfer characteristic. (3) DAC Gain Error is the difference in slope of the straight line defined by DAC output at code 0d12 and 0d1011 points of transfer characteristic, and that of the ideal characteristic. 6 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: LMP92018 |
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