ADS7881

SLAS400B − SEPTEMBER 2003 − REVISED NOVEMBER 2005

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9

CONVERSION ABORT

The falling edge of CS aborts the conversion while BUSY is high and CONVST is high (see Figure 4). The device

outputs FE0 (hex) to indicate a conversion abort.

1111 1110 0000

td5

CS

CONVST

BUSY

tsu1

RD

D11−D0

Figure 4. Conversion Abort

DATA READ

Two conditions need to be satisfied for a read operation. Data appears on the D11 through D0 pins (with D11

MSB) when both CS and RD are low. Figure 5 and Figure 6 illustrate the device read operation. The bus is

three-stated if any one of the signals is high.

D11−4 & D3−0

D3−0

tw5

CS

CONVST

BUSY

D11−D0

td2

td1 + t(acq)

t(conv)

td11

td6

td7

td9

BYTE

t1

RD

Figure 5. Read Control Via CS and RD

There are two output formats available. Twelve bit data appears on the bus during a read operation while BYTE

is low. When BYTE is high, the lower byte (D3 through D0 followed by all zeroes) appears on the data bus with

D3 in the MSB. This feature is useful for interfacing with eight bit microprocessors and microcontrollers.