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ADS1208IPW Datasheet(PDF) 3 Page - Texas Instruments

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No. de pieza ADS1208IPW
Descripción Electrónicos  2nd-Order Delta-Sigma Modulator with Excitation for Hall Elements
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

ADS1208IPW Datasheet(HTML) 3 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS
ADS1208
SBAS348A – MARCH 2005 – REVISED MARCH 2005
Over recommended operating free-air temperature range at –40°C to +85°C, AV
DD = BVDD = +5V, VREF = internal +2.5V,
Mode 3, MCLK input = 20MHz, differential input voltage = 200mV
PP, common-mode voltage = 1.4V, and 16-bit Sinc
3 filter with
OSR = 256, unless otherwise noted.
ADS1208I
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX
UNIT
Resolution
16
Bits
DC Accuracy
Integral nonlinearity(2)
16-bit resolution
–8
1.6
8
LSB
Integral nonlinearity
–0.012
0.0025
0.012
%
Differential nonlinearity(3)
16-bit resolution
–1.0
1.0
LSB
Input offset(4)
–2.0
–1.4
0
mV
Input offset drift
2.0
8.0
µV/°C
Gain error(4)
Referenced to voltage at REFIN
–1.25
–0.7
1.25
%
Gain error drift
Referenced to voltage at REFIN
15
ppm/°C
Power-supply rejection ratio
66
dB
Analog Input
Full-scale range
VIN+– VIN–
–125
125
mV
Operating common-mode signal
0.8
1.4
2.5
V
Input capacitance
5.0
pF
Common-mode rejection
95
dB
Current Source (IOUT)
Output current(5)
IOUT
1.0
5.0
8.0
mA
Voltage at IOUT pin
VOUT
0
AVDD – 1.0
V
Voltage between AVDD pin and IADJ
VADJ at IOUT = 1mA to 8mA
480
500
520
mV
Internal Voltage Reference
Reference output voltage
REFOUT
2.45
2.5
2.55
V
Reference temperature drift
20
ppm/°C
Output resistance
0.3
Output source current
3.0
mA
Power-supply rejection ratio
60
dB
Startup time
0.1
ms
Voltage Reference Input
Reference voltage input
REFIN
0.5
3.0
V
Reference input capacitance
5
pF
Reference input current
-50
+50
nA
Internal Clock for Modes 0, 1 and 2
Clock frequency
8.0
10.1
12.0
MHz
External Clock for Mode 3
Clock frequency
1.0
24.0
MHz
(1)
All values are at TA = 25°C.
(2)
Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer
curve for VIN+– VIN– = –100mV to +100mV, expressed either as the number of LSBs or as a percent of the measured input range
(200mV).
(3)
Ensured by design.
(4)
Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5)
It is possible to leave pin IOUT unconnected (IOUT = 0mA).
3


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