ADS1245

SBAS287A − JUNE 2003 − REVISED SEPTEMBER 2003

www.ti.com

3

ELECTRICAL CHARACTERISTICS

All specifications at TA = −40°C to +85°C, AVDD = +5V, DVDD = +3V, fCLK = 2.4576MHz, and VREF = +1.25V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Analog Input

Full-scale input voltage range

AINP − AINN

±2VREF

V

Absolute input range

AINP, AINN with respect to GND

GND + 0.1

AVDD − 1.25

V

Differential input impedance

fCLK = 2.4576MHz

3

G

Ω

System Performance

Resolution

No missing codes

24

Bits

Data rate

fCLK = 2.4576MHz

15

SPS(1)

Integral nonlinearity (INL)

Differential input signal, end point fit

±0.0006

±0.0015

Offset error

1

14

ppm of FSR

Offset error drift(3)

0.01

ppm of FSR/

°C

Gain error(4)

0.005

0.1

%

Gain error drift(3)

0.5

ppm/

°C

At DC

90

100

dB

Common-mode rejection

fCM(5) = 50 ± 1Hz, fCLK = 2.4576MHz

100

dB

Common-mode rejection

fCM = 60 ± 1Hz, fCLK = 2.4576MHz

100

dB

Normal-mode rejection

fSIG(6) = 50 ± 1Hz, fCLK = 2.4576MHz

60

dB

Normal-mode rejection

fSIG = 60 ± 1Hz, fCLK = 2.4576MHz

70

dB

Input referred noise

2

ppm of FSR,

RMS

Analog power-supply rejection

At DC,

∆AVDD = 5%

100

dB

Digital power-supply rejection

At DC,

∆AVDD = 5%

100

dB

Voltage Reference Input

Reference input voltage (VREF)

VREF ≡ VREFP − VREFN

0.5

1.25

AVDD(7)

V

Negative reference input (VREFN)

GND − 0.1

VREFP − 0.5

V

Positive reference input (VREFP)

VREFN + 0.5

AVDD + 0.1

V

Voltage reference impedance

fCLK = 2.4576MHz

1

M

Ω

Digital Input/Output

VIH (CLK, SCLK)

0.8 DVDD

5.25

V

Logic levels

VIL (CLK, SCLK)

GND

0.2 DVDD

V

Logic levels

VOH (DRDY, DOUT)

IOH = 1mA

DVDD − 0.4

DVDD

V

VOL (DRDY, DOUT)

IOL = 1mA

GND

DVDD + 0.4

V

Input leakage (CLK, SCLK)

0 < (CLK, SCLK) < DVDD

±10

µA

CLK frequency (fCLK)

6

MHz

CLK duty cycle

30

70

%

Power Supply

AVDD

2.7

5.25

V

DVDD

1.8

3.6

V

Sleep mode

0.1

1

µA

AVDD current

AVDD = 3V

152

µA

AVDD current

AVDD = 5V

158

250

µA

Sleep mode, CLK stopped

0.1

µA

DVDD current

Sleep mode, 2.4576MHZ CLK running

1.6

5

µA

DVDD current

DVDD = 3V

5

10

µA

Total power dissipation

AVDD = DVDD = 3V

0.47

mW

(1) SPS = samples per second.

(2) FSR = full-scale range = 4VREF.

(3) Recalibration can reduce these errors to the level of the noise.

(4) Achieving specified gain error performance requires that calibration be performed with reference voltage input between (GND + 0.1V) and

(AVDD − 1.25V). See Voltage Reference Inputs section.

(5) fCM is the frequency of the common-mode input.

(6) fSIG is the frequency of the input signal.

(7) It will not be possible to reach the digital output full-scale code when VIN > 2VREF.