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ADC12040 Datasheet(PDF) 4 Page - Texas Instruments

No. de pieza ADC12040
Descripción Electrónicos  12-Bit, 40 MSPS, 340mW A/D Converter with Internal Sample-and-Hold
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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ADC12040 Datasheet(HTML) 4 Page - Texas Instruments

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ADC12040
SNAS135G – FEBRUARY 2001 – REVISED MARCH 2013
www.ti.com
PIN DESCRIPTIONS AND EQUIVALENT CIRCUITS (continued)
Pin No.
Symbol
Equivalent Circuit
Description
Digital data output pins that make up the 12-bit conversion results.
14–19,
D0–D11
D0 is the LSB, while D11 is the MSB of the offset binary output
22–27
word. Output levels are TTL/CMOS compatible.
ANALOG POWER
Positive analog supply pins. These pins should be connected to a
quiet +5V voltage source and bypassed to ground with 0.1 µF
5, 6, 29
VA
monolithic capacitors located within 1 cm of these power pins, and
with a 10 µF capacitor.
4, 7, 28
AGND
The ground return for the analog supply.
DIGITAL POWER
Positive digital supply pin. This pin should be connected to the same
quiet +5V source as is VA and bypassed to ground with a 0.1 µF
13
VD
monolithic capacitor in parallel with a 10 µF capacitor, both located
within 1 cm of the power pin.
9, 12
DGND
The ground return for the digital supply.
Positive digital supply pin for the ADC12040's output drivers. This
pin should be connected to a voltage source of +2.35V to +5V and
be bypassed to DR GND with a 0.1 µF monolithic capacitor. If the
21
VDR
supply for this pin is different from the supply used for VA and VD, it
should also be bypassed with a 10 µF tantalum capacitor. VDR
should never exceed the voltage on VD. All bypass capacitors should
be located within 1 cm of the supply pin.
The ground return for the digital supply for the ADC12040's output
drivers. This pin should be connected to the system ground, but not
20
DR GND
be connected in close proximity to the ADC12040's DGND or AGND
pins. See LAYOUT AND GROUNDING for more details.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
4
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Product Folder Links: ADC12040


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