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GMS81C2112 Datasheet(PDF) 83 Page - Hynix Semiconductor |
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GMS81C2112 Datasheet(HTML) 83 Page - Hynix Semiconductor |
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GMS81C2112/GMS81C2120 JUNE. 2001 Ver 1.00 77 Figure 17-5 Internal RCWDT Mode Releasing by External Interrupt or WDT Interrupt Figure 17-6 Internal RCWDT Mode Releasing by RESET 17.5 Minimizing Current Consumption The Stop mode is designed to reduce power consumption. To minimize current drawn during Stop mode, the user should turn-off output drivers that are sourcing or sinking current, if it is practical. Note: In the STOP operation, the power dissipation asso- ciated with the oscillator and the internal hardware is low- ered; however, the power dissipation associated with the pin interface (depending on the external circuitry and pro- gram) is not directly determined by the hardware operation of the STOP feature. This point should be little current flows when the input level is stable at the power voltage level (VDD/VSS); however, when the input level becomes higher RCWDT Mode Normal Operation Oscillator (XI pin) N+1 N N+2 00 01 FE FF 00 00 N-1 N-2 Clear Basic Interval Timer STOP Instruction Execution Normal Operation Stabilization Time tST > 20mS Internal Clock External Interrupt BIT Counter Internal RC Clock ( or WDT Interrupt ) Oscillator (XI pin) Internal Clock Internal RC Clock Time can not be control by software STOP Instruction Execution Stabilization Time tST = 64mS @4MHz Internal RESET by WDT RESET RESET RCWDT Mode |
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