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GMS81C2112 Datasheet(PDF) 33 Page - Hynix Semiconductor |
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GMS81C2112 Datasheet(HTML) 33 Page - Hynix Semiconductor |
33 / 107 page ![]() GMS81C2112/GMS81C2120 JUNE. 2001 Ver 1.00 27 Note: Several names are given at same address. Refer to below table. Address Symbol R/W RESET Value Addressing mode 0C0H 0C1H 0C4H 0C5H 0C6H 0C7H 0CAH 0CBH 0CCH 0CDH R0 R0IO R2 R2IO R3 R3IO R5 R5IO R6 R6IO R/W W R/W W R/W W R/W W R/W W Undefined 0000_0000 Undefined 0000_0000 Undefined ---0_0000 Undefined 0000_0--- Undefined 0000_0000 byte, bit1 byte2 byte, bit byte byte, bit byte byte, bit byte byte, bit byte 0D0H 0D1H 0D1H 0D1H 0D2H 0D3H 0D3H 0D4H 0D4H 0D4H 0D5H 0DEH TM0 T0 TDR0 CDR0 TM1 TDR1 T1PPR T1 CDR1 T1PDR PWM1HR BUR R/W R W R R/W W W R R R/W W W --00_0000 0000_0000 1111_1111 0000_0000 0000_0000 1111_1111 1111_1111 0000_0000 0000_0000 0000_0000 ----_0000 1111_1111 byte, bit byte byte byte byte, bit byte byte byte byte byte, bit byte byte 0E0H 0E1H 0E2H 0E3H 0E4H 0E5H 0E6H 0EAH 0EBH 0ECH 0ECH 0EDH 0EDH 0EFH SIOM SIOR IENH IENL IRQH IRQL IEDS ADCM ADCR BITR CKCTLR WDTR WDTR PFDR R/W R/W R/W R/W R/W R/W R/W R/W R R W R W R/W 0000_0001 Undefined 0000_---- 0000_---- 0000_---- 0000_---- ----_0000 -000_0001 Undefined 0000_0000 -001_0111 0000_0000 0111_1111 ----_-100 byte, bit byte, bit byte, bit byte, bit byte, bit byte, bit byte, bit byte, bit byte byte byte byte byte byte, bit 0F4H 0F6H 0F7H 0F9H 0FAH 0FBH R0FUNC R5FUNC R6FUNC R5NODR SCMR RA W W W W R/W R ----_0000 -0--_---- 0000_0000 0000_0--- ---0_0000 Undefined byte byte byte byte byte -3 Table 8-1 Control Registers 1. "byte, bit" means that register can be addressed by not only bit but byte manipulation instruction. 2. "byte" means that register can be addressed by only byte manipulation instruction. On the other hand, do not use any read-modify-write instruction such as bit manipulation for clearing bit. 3. RA is one-bit high-voltage input only port pin. In addition, RA serves the functions of the Vdisp special features. Vdisp is used as a high-voltage input power supply pin when selected by the mask option. Addr. When read When write Timer Mode Capture Mode PWM Mode Timer Mode PWM Mode D1H T0 CDR0 - TDR0 - D3H - TDR1 T1PPR D4H T1 CDR1 T1PDR - T1PDR ECH BITR CKCTLR Table 8-2 Various Register Name in Same Address |