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GMS81C2112 Datasheet(PDF) 44 Page - Hynix Semiconductor

No. de Pieza. GMS81C2112
Descripción  HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS
Descarga  107 Pages
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Fabricante  HYNIX [Hynix Semiconductor]
Página de inicio  http://www.skhynix.com/ko/index.jsp
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GMS81C2112 Datasheet(HTML) 44 Page - Hynix Semiconductor

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GMS81C2112/GMS81C2120
38
JUNE. 2001 Ver 1.00
Table 10-1 Basic Interval Timer Interrupt Time
Figure 10-2 BITR: Basic Interval Timer Mode Register
Example 1:
Basic Interval Timer Interrupt request flag is generated
every 4.096ms at 4MHz.
:
LDM
CKCTLR,#03H
SET1
BITE
EI
:
Example 2:
Basic Interval Timer Interrupt request flag is generated
every 1.024ms at 4MHz.
:
LDM
CKCTLR,#01H
SET1
BITE
EI
:
CKCTLR
[2:0]
Source clock
Interrupt (overflow) Period (ms)
@ fXIN = 4MHz
000
001
010
011
100
101
110
111
fXIN÷8
fXIN÷16
fXIN÷32
fXIN÷64
fXIN÷128
fXIN÷256
fXIN÷512
fXIN÷1024
0.512
1.024
2.048
4.096
8.192
16.384
32.768
65.536
BTCL
76
54
32
10
RCWDT
-
BTS1
Basic Interval Timer source clock select
000: fXIN ÷ 8
001: fXIN ÷ 16
010: fXIN ÷ 32
011: fXIN ÷ 64
100: fXIN ÷ 128
101: fXIN ÷ 256
110: fXIN ÷ 512
111: fXIN ÷ 1024
Clear bit
0: Normal operation (free-run)
1: Clear 8-bit counter (BITR) to “0”. This bit becomes 0 automatically
INITIAL VALUE: -001 0111B
ADDRESS: 0ECH
after one machine cycle, and starts counting.
CKCTLR
INITIAL VALUE: Undefined
ADDRESS: 0ECH
BITR
Both register are in same address,
when write, to be a CKCTLR,
when read, to be a BITR.
Caution:
8-BIT FREE-RUN BINARY COUNTER
WDTON
BTS0
BTS2
BTCL
BTCL
76
54
32
10
0: Operate as a 7-bit general timer
1: Enable Watchdog Timer operation
See the section “Watchdog Timer”.
WAKEUP
0: Disable Wake-up Timer
1: Enable Wake-up Timer
0: Disable Internal RC Watchdog Timer
1: Enable Internal RC Watchdog Timer


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