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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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GMS81C2112 Datasheet(PDF) 52 Page - Hynix Semiconductor |
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GMS81C2112 Datasheet(HTML) 52 Page - Hynix Semiconductor |
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GMS81C2112/GMS81C2120 46 JUNE. 2001 Ver 1.00 8-bit Timer Mode In the timer mode, the internal clock is used for counting up. Thus, you can think of it as counting internal clock in- put. The contents of TDRn are compared with the contents of up-counter, Tn. If match is found, a timer 1 interrupt (T1IF) is generated and the up-counter is cleared to 0. Counting up is resumed after the up-counter is cleared. As the value of TDRn is changeable by software, time in- terval is set as you want Figure 12-3 Timer Mode Timing Chart Figure 12-4 Timer Count Example 0 n-2 2 0 n 3 n-1 n Source clock Up-counter TDR1 T1IF interrupt Start count 1 23 1 4 Match Detect Counter Clear Timer 1 (T1IF) Interrupt TDR1 TIME Occur interrupt Occur interrupt Occur interrupt Interrupt period 0 1 2 3 4 5 6 7A 7D 7C Count Pulse = 8 µs x 125 7B MATCH Example: Make 2ms interrupt using by Timer0 at 4MHz LDM TM0,#0FH ; divide by 32 LDM TDR0,#125 ; 8us x 125= 1ms SET1 T0E ; Enable Timer 0 Interrupt EI ; Enable Master Interrupt Period When TDR0 = 125D = 7DH fXIN = 4 MHz INTERRUPT PERIOD = 4 × 106 Hz 1 × 32 × 125 = 1 ms TM0 = 0000 1111B (8-bit Timer mode, Prescaler divide ratio = 32) 8 µs (TDR0 = T0) 7D 0 |
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