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GMS81C2112 Datasheet(PDF) 62 Page - Hynix Semiconductor |
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GMS81C2112 Datasheet(HTML) 62 Page - Hynix Semiconductor |
62 / 107 page ![]() GMS81C2112/GMS81C2120 56 JUNE. 2001 Ver 1.00 13. ANALOG DIGITAL CONVERTER The analog-to-digital converter (A/D) allows conversion of an analog input signal to a corresponding 8-bit digital value. The A/D module has eight analog inputs, which are multiplexed into one sample and hold. The output of the sample and hold is the input into the converter, which gen- erates the result via successive approximation. The analog supply voltage is connected to AVDD of ladder resistance of A/D module. The A/D module has two registers which are the control register ADCM and A/D result register ADR. The register ADCM, shown in Figure 13-1, controls the operation of the A/D converter module. The port pins can be configured as analog inputs or digital I/O. To use analog inputs, each port is assigned analog input port by setting the bit ANSEL[7:0] in R6FUNC register. And selected the corresponding channel to be converted by setting ADS[3:0]. How to Use A/D Converter The processing of conversion is start when the start bit ADST is set to "1". After one cycle, it is cleared by hard- ware. The register ADCR contains the results of the A/D conversion. When the conversion is completed, the result is loaded into the ADCR, the A/D conversion status bit ADSF is set to "1", and the A/D interrupt flag ADIF is set. The block diagram of the A/D module is shown in Figure 13-2. The A/D status bit ADSF is set automatically when A/D conversion is completed, cleared when A/D conver- sion is in process. The conversion time takes maximum 20 uS (at fXI=4 MHz) Figure 13-1 A/D Converter Control Register BTCL 765 432 10 - ADST A/D status bit Analog input channel select INITIAL VALUE: -0-0 0001B ADDRESS: 0EAH ADCM ADSF A/D converter Enable bit 0: A/D converter module turn off and current is not flow. 1: Enable A/D converter R/W R/W R/W R/W R/W R 000: Channel 0 (AN0) 001: Channel 1 (AN1) 010: Channel 2 (AN2) 011: Channel 3 (AN3) 100: Channel 4 (AN4) 101: Channel 5 (AN5) 110: Channel 6 (AN6) 111: Channel 7 (AN7) 0: A/D conversion is in progress 1: A/D conversion is completed A/D start bit Setting this bit starts an A/D conversion. After one cycle, bit is cleared to “0” by hardware. ADS1 ADS0 - ADS2 INITIAL VALUE: Undefined ADDRESS: 0EBH ADCR A/D Conversion Data BTCL 76 54 32 10 RRR R R R R R ADEN |