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IDT7200L Datasheet(PDF) 9 Page - Integrated Device Technology

No. de pieza IDT7200L
Descripción Electrónicos  CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1,024 x 9
Download  13 Pages
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Fabricante Electrónico  IDT [Integrated Device Technology]
Página de inicio  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7200L Datasheet(HTML) 9 Page - Integrated Device Technology

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9
IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
R
W
HF
t RHF
2679 drw 11
HALF-FULL OR LESS
MORE THAN HALF-FULL
HALF-FULL OR LESS
t WHF
Figure 9. Half-Full Flag Timing
R
W
XO
2679 drw 12
WRITE TO
LAST PHYSICAL
LOCATION
t XOL
t XOH
READ FROM
LAST PHYSICAL
LOCATION
t XOL
t XOH
Figure 10. Expansion Out
W
R
XI
WRITE TO
FIRST PHYSICAL
LOCATION
t XIS
READ FROM
FIRST PHYSICAL
LOCATION
t XIS
t XI
t XIR
2679 drw 13
Figure 11. Expansion In
OPERATING MODES:
Care must be taken to assure that the appropriate flag is
monitored by each system (i.e.
FF is monitored on the device
where
W is used; EF is monitored on the device where R is
used). For additional information, refer to Tech Note 8:
Oper-
ating FIFOs on Full and Empty Boundary Conditions and
Tech Note 6:
Designing with FIFOs.
Single Device Mode
A single IDT7200/7201A/7202A may be used when the
application requirements are for 256/512/1,024 words or less.
These devices are in a Single Device Configuration when the
Expansion In (
XI) control input is grounded (see Figure 12).
Depth Expansion
The IDT7200/7201A/7202A can easily be adapted to appli-
cations when the requirements are for greater than 256/512/
1,024 words. Figure 14 demonstrates Depth Expansion using
three IDT7200/7201A/7202As. Any depth can be attained by
adding additional IDT7200/7201A/7202As.
These FIFOs
operate in the Depth Expansion mode when the following
conditions are met:
1. The first device must be designated by grounding the First
Load (
FL) control input.
2. All other devices must have
FL in the high state.
3. The Expansion Out (
XO) pin of each device must be tied
to the Expansion In (
XI) pin of the next device. See Figure
14.
4. External logic is needed to generate a composite Full Flag
(
FF) and Empty Flag (EF). This requires the ORing of all
EFs and ORing of all FFs (i.e. all must be set to generate
the correct composite
FF or EF). See Figure 14.
5. The Retransmit (
RT) function and Half-Full Flag (HF) are
not available in the Depth Expansion Mode.
For additional information, refer to Tech Note 9:
Cascad-
ing FIFOs or FIFO Modules.


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