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AD5380 Datasheet(PDF) 1 Page - Analog Devices |
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AD5380 Datasheet(HTML) 1 Page - Analog Devices |
1 / 40 page 40-Channel, 3 V/5 V, Single-Supply, 14-Bit, denseDAC Data Sheet AD5380 Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2004–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Guaranteed monotonic INL error: ±4 LSB max On-chip 1.25 V/2.5 V, 10 ppm/°C reference Temperature range: –40°C to +85°C Rail-to-rail output amplifier Power down Package type: 100-lead LQFP (14 mm × 14 mm) User interfaces Parallel Serial (SPI®-, QSPI™-, MICROWIRE™-, DSP-compatible, featuring data readback) I2C®-compatible Robust 6.5 kV HBM and 2 kV FICDM ESD rating INTEGRATED FUNCTIONS Channel monitor Simultaneous output update via LDAC Clear function to user programmable code Amplifier boost mode to optimize slew rate User programmable offset and gain adjust Toggle mode enables square wave generation Thermal monitor APPLICATIONS Variable optical attenuators (VOA) Level setting (ATE) Optical micro-electro-mechanical systems (MEMS) Control systems Instrumentation FUNCTIONAL BLOCK DIAGRAM Figure 1. R R VOUT DAC 0 DAC REG0 INPUT REG0 14 14 14 14 14 14 m REG0 c REG0 1.25V/2.5V REFERENCE POWER-ON RESET 39-TO-1 MUX R R VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 DAC 1 DAC REG1 INPUT REG1 14 14 14 14 14 14 m REG1 c REG1 R R VOUT6 DAC 6 DAC REG6 INPUT REG6 14 14 14 14 14 14 m REG6 c REG6 R R VOUT7 VOUT8 DAC 7 DAC REG7 INPUT REG7 14 14 14 14 14 14 m REG7 c REG7 ×5 FIFO + STATE MACHINE + CONTROL LOGIC INTERFACE CONTROL LOGIC DB13/(DIN/SDA) DB12/(SCLK/SCL) DB11/(SPI/I2C) DB10 A5 A0 VOUT0………VOUT38 REG0 REG1 RESET BUSY CLR PD SER/PAR FIFO EN CS/(SYNC/AD0) WR/(DCEN/AD1) SDO VOUT39/MON_OUT LDAC VOUT38 DVDD (×3) DGND (×3) AVDD (×5) AGND (×5) DAC_GND (×5) REFGND REFOUT/REFIN SIGNAL_GND (×5) AD5380 DB0 |
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