CAT28C16A

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6

DATA Polling

DATA polling is provided to indicate the completion of a

byte write cycle. Once a byte write cycle is initiated,

attempting to read the last byte written will output the

indeterminate) until the programming cycle is complete.

Upon completion of the self−timed byte write cycle, all I/O’s

will output true data during a read cycle.

Figure 6. Byte Write Cycle [CE Controlled]

ADDRESS

DATA OUT

DATA IN

DATA VALID

HIGH−Z

WE

OE

CE

Figure 7. DATA Polling

ADDRESS

I/O7

WE

OE

CE

Hardware Data Protection

The following is a list of hardware data protection features

that are incorporated into the CAT28C16A.

falls below 3.0 V min.

characteristics), provides a 5 to 20 ms delay before

min.

3. Write inhibit is activated by holding any one of

OE low, CE high or WE high.

4. Noise pulses of less than 20 ns on the WE or CE

inputs will not result in a write cycle.