Data Sheet

AD5725

Rev. C | Page 9 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

28

27

26

25

DGND

5

CLR

6

LDAC

7

24

CS

23

A0

22

DB0 (LSB)

8

A1

21

DB1

9

R/W

20

DB11 (MSB)

19

DB10

18

DB9

17

DB8

16

DB7

15

AD5725

TOP VIEW

(Not to Scale)

Figure 6. Pin Configuration Diagram

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

Positive DAC Reference Input. The voltage applied to this pin defines the full-scale output voltage.

2

Buffered Analog Output Voltage of DAC B.

3

Buffered Analog Output Voltage of DAC A.

4

Negative Analog Supply Pin. Voltage ranges from 0 V to −15 V.

5

DGND

Digital Ground Pin.

6

CLR

Active Low Input. Sets input registers and DAC registers to zero scale (0x000) for the AD5725-1 or midscale

(0x800) for the AD5725.

7

LDAC

Active Low Load DAC Input.

8

DB0

Data Bit 0 (LSB).

9

DB1

Data Bit 1.

10

DB2

Data Bit 2.

11

DB3

Data Bit 3.

12

DB4

Data Bit 4.

13

DB5

Data Bit 5.

14

DB6

Data Bit 6.

15

DB7

Data Bit 7.

16

DB8

Data Bit 8.

17

DB9

Data Bit 9.

18

DB10

Data Bit 10.

19

DB11

Data Bit 11 (MSB).

20

R/W

Read/Write Pin. Active low to write data to DAC; Active high to read back previous data at data bit pins with

21

A1

Address Bit 1.

22

A0

Address Bit 0.

23

CS

Active Low Chip Select Pin.

24

Voltage Supply for Readback Function. Can be left open circuit if not used.

25

Positive Analog Supply Pin. Voltage ranges from +5 V to +15 V.

26

Buffered Analog Output Voltage of DAC D.

27

Buffered Analog Output Voltage of DAC C.

28

Negative DAC Reference Input. The voltage applied to this pin defines the zero-scale output voltage.