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AD7451 Datasheet(PDF) 1 Page - Analog Devices |
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AD7451 Datasheet(HTML) 1 Page - Analog Devices |
1 / 25 page Pseudo Differential Input, 1 MSPS, 10-/12-Bit ADCs in an 8-Lead SOT-23 AD7441/AD7451 Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2003–2010 Analog Devices, Inc. All rights reserved. FEATURES Fast throughput rate: 1 MSPS Specified for VDD of 2.7 V to 5.25 V Low power at maximum throughput rate: 4 mW maximum at 1 MSPS with VDD = 3 V 9.25 mW maximum at 1 MSPS with VDD = 5 V Pseudo differential analog input Wide input bandwidth: 70 dB SINAD at 100 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface: SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible Power-down mode: 1 μA maximum 8-lead SOT-23 and MSOP packages APPLICATIONS Transducer interface Battery-powered systems Data acquisition systems Portable instrumentation FUNCTIONAL BLOCK DIAGRAM VREF T/H CONTROL LOGIC 12-BIT SUCCESSIVE APPROXIMATION ADC GND SCLK SDATA CS VDD AD7441/AD7451 VIN+ VIN– Figure 1. GENERAL DESCRIPTION The AD7441/AD74511 are, respectively, 10-/12-bit high speed, low power, single-supply, successive approximation (SAR), analog-to-digital converters (ADCs) that feature a pseudo differential analog input. These parts operate from a single 2.7 V to 5.25 V power supply and achieve very low power dissipation at high throughput rates of up to 1 MSPS. The AD7441/AD7451 contain a low noise, wide bandwidth, differential track-and-hold (T/H) amplifier that handles input frequencies up to 3.5 MHz. The reference voltage for these devices is applied externally to the VREF pin and can range from 100 mV to VDD, depending on the power supply and what suits the application. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the device to interface with microprocessors or DSPs. The input signals are sampled on the falling edge of CS when the conversion is initiated. The SAR architecture of these parts ensures that there are no pipeline delays. 1 Protected by U.S. Patent Number 6,681,332. PRODUCT HIGHLIGHTS 1. Operation with 2.7 V to 5.25 V Power Supplies. 2. High Throughput with Low Power Consumption. With a 3 V supply, the AD7441/AD7451 offer 4 mW maxi- mum power consumption for a 1 MSPS throughput rate. 3. Pseudo Differential Analog Input. 4. Flexible Power/Serial Clock Speed Management. The conversion rate is determined by the serial clock, allowing the power to be reduced as the conversion time is reduced through the serial clock speed increase. These parts also feature a shutdown mode to maximize power efficiency at lower throughput rates. 5. Variable Voltage Reference Input. 6. No Pipeline Delays. 7. Accurate Control of Sampling Instant via CS Input and Once-Off Conversion Control. 8. ENOB > 10 Bits Typically with 500 mV Reference. |
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