AD7762_15 datasheet(8/29 Pages) AD

No. de pieza	AD7762

Descripción Electrónicos	625 kSPS, 24-Bit, 109 dB Sigma-Delta ADC With On-Chip Buffer

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Fabricante Electrónico	AD [Analog Devices]

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8 / 29 page

Data Sheet

AD7762

Rev. A | Page 7 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

64 63 62

61

60 59 58

57 56 55 54 53 52 51 50 49

47

DB13

46

DB14

45

DB15

42

DGND

43

DGND

44

VDRIVE

48

DB12

NOTES

1. CONNECT THE EXPOSED PAD TO AGNDx WITH SIX TO EIGHT VIAS.

41

DVDD

40

CS

39

RD/WR

37

RESET

36

SYNC

35

DGND

34

AGND1

33

AVDD1

38

DRDY

2

MCLKGND

3

MCLK

4

AVDD2

7

AGND1

6

AVDD1

5

AGND2

1

DGND

8

DECAPA

9

REFGND

10

VREF+

12

AVDD4

13

AGND2

14

AVDD2

15

AVDD2

16

AGND2

11

AGND4

PIN 1

17 18

19

20

21 22 23

24 25 26

27 28 29 30 31 32

AD7762

TOP VIEW

(Not to Scale)

Figure 4. 64-Lead TQFP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

6, 33

AVDD1

2.5 V Power Supply for Modulator. These pins should be decoupled to AGND1 with 100 nF and 10 µF

capacitors on each pin.

4, 14, 15, 27

AVDD2

5 V Power Supply. These pins should be decoupled to AGND2 with 100 nF capacitors on each of Pin 4,

Pin 14, and Pin 15. Pin 27 should be connected to Pin 14 via a 15 nH inductor.

24

AVDD3

3.3 V to 5 V Power Supply for Differential Amplifier. These pins should be decoupled to AGND3 with a

100 nF capacitor.

12

AVDD4

3.3 V to 5 V Power Supply for Reference Buffer. This pin should be decoupled to AGND4 with a

10 nF capacitor in series with a 10 Ω resistor.

7, 34

AGND1

Power Supply Ground for Analog Circuitry Powered by AVDD1.

5, 13, 16, 18, 28

AGND2

Power Supply Ground for Analog Circuitry Powered by AVDD2.

23, 29, 31, 32

AGND3

Power Supply Ground for Analog Circuitry Powered by AVDD3.

11

AGND4

Power Supply Ground for Analog Circuitry Powered by AVDD4.

9

REFGND

Reference Ground. Ground connection for the reference voltage.

41

DVDD

2.5 V Power Supply for Digital Circuitry and FIR Filter. This pin should be decoupled to DGND with a

100 nF capacitor.

44, 63

VDRIVE

Logic Power Supply Input, 1.8 V to 2.5 V. The voltage supplied at these pins determines the operating

voltage of the logic interface. Both these pins must be connected together and tied to the same supply.

Each pin should also be decoupled to DGND with a100 nF capacitor.

1, 35, 42, 43,

53, 62, 64

DGND

Ground Reference for Digital Circuitry.

19

VINA+

Positive Input to Differential Amplifier.

20

VINA−

Negative Input to Differential Amplifier.

21

VOUTA−

Negative Output from Differential Amplifier.

22

VOUTA+

Positive Output from Differential Amplifier.

25

VIN+

Positive Input to the Modulator.

26

VIN−

Negative Input to the Modulator.

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