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All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate

and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which

may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Sales Office Headquarters

NORTH AMERICA

Intersil Corporation

P. O. Box 883, Mail Stop 53-204

Melbourne, FL 32902

TEL: (321) 724-7000

FAX: (321) 724-7240

EUROPE

Intersil SA

Mercure Center

100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2.724.2111

FAX: (32) 2.724.22.05

ASIA

Intersil (Taiwan) Ltd.

Taiwan Limited

7F-6, No. 101 Fu Hsing North Road

Taipei, Taiwan

Republic of China

TEL: (886) 2 2716 9310

FAX: (886) 2 2715 3029

CD4076BMS

FIGURE 11. FUNCTIONAL WAVEFORM

tPHZ

VDD

VSS

VDD

VOL

VOH

VSS

50%

90%

10%

50%

tPZH

10%

90%

tPZL

tPLZ

Q OUTPUT

Q OUTPUT

OUTPUT DISABLE

CHARACTER

TEST

VOLTAGE

AT D

AT Q

tPHZ

VDD

VSS

tPLZ

VSS

VDD

tPZL

VSS

VDD

tPZH

VDD

VSS

Chip Dimensions and Pad Layout

METALLIZATION:

Thickness: 11k

Å

PASSIVATION:

10.4kÅ - 15.6k

BOND PADS:

0.004 inches X 0.004 inches MIN

DIE THICKNESS:

0.0198 inches - 0.0218 inches

Dimensions in parentheses are in millimeters

and are derived from the basic inch dimensions