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CD54ACT541F3A Datasheet(PDF) 4 Page - Intersil Corporation

No. de pieza CD54ACT541F3A
Descripción Electrónicos  Octal Buffer/Line Driver Three-State, Non-Inverting
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Fabricante Electrónico  INTERSIL [Intersil Corporation]
Página de inicio  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CD54ACT541F3A Datasheet(HTML) 4 Page - Intersil Corporation

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4
ACT Input Load Table
INPUT
UNIT LOAD
Data
0.5
OE1, OE2
1.3
NOTE: Unit load is
∆ICC limit specified in DC Electrical Specifications
Table, e.g., 2.4mA max at 25oC.
Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case)
PARAMETER
SYMBOL
VCC (V)
-55oC TO 125oC
UNITS
MIN
TYP
MAX
AC TYPES
Propagation Delay, Data to Output
tPLH, tPHL
1.5
-
-
98
ns
3.3 (Note 9)
3.3
-
10.9
ns
5 (Note 10)
2.3
-
7.8 (Note 8)
ns
Propagation Delay, Enable, Disable to
Output
tPZL, tPZH
1.5
-
-
150
3.3
5.4
-
18
5
3.6
-
12 (Note 8)
tPLZ, tPHZ
1.5
-
-
150
3.3
4.5
-
15
5
3.6
-
12 (Note 8)
Minimum (Valley) VOH During Switching
of Other Outputs
(Output Under Test Not Switching)
VOHV
See Figure 1
5
-
4 at 25oC-
V
Maximum (Peak) VOL During Switching of
Other Outputs
(Output Under Test Not Switching)
VOLP
See Figure 1
5
-
1 at 25oC-
V
Three-State Output Capacitance
CO
--
-
15
pF
Input Capacitance
CI
--
-
10
pF
Power Dissipation Capacitance
CPD (Note 11)
-
-
60
-
pF
ACT TYPES
Propagation Delay, Data to Output
tPLH, tPHL
5 (Note 10)
2.5
-
8.3 (Note 8)
ns
Propagation Delay, Enable, Disable to
Output
tPLZ, tPZL,
tPZH, tPHZ
5
4
-
13.4 (Note 8)
ns
Minimum (Valley) VOH During Switching
of Other Outputs
(Output Under Test Not Switching)
VOHV
See Figure 1
5
-
4 at 25oC-
V
Maximum (Peak) VOL During Switching of
Other Outputs
(Output Under Test Not Switching)
VOLP
See Figure 1
5
-
1 at 25oC-
V
Three-State Output Capacitance
CO
--
-
15
pF
Input Capacitance
CI
--
-
10
pF
Power Dissipation Capacitance
CPD (Note 11)
-
-
60
-
pF
NOTES:
8. Limits tested 100%.
9. 3.3V Min is at 3.6V, Max si at 3V.
10. 5V Min is at 5.5V, Max is at 4.5V
11. CPD is used to determine the dynamic power consumption per gate.
AC: PD = VCC
2 f
i (CPD + CL)
ACT: PD = VCC
2 f
i (CPD + CL) + VCC ∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
CD54AC541F3A, CD54ACT541F3A


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