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HCS157MS Datasheet(PDF) 1 Page - Intersil Corporation

No. de pieza HCS157MS
Descripción Electrónicos  Radiation Hardened Quad 2-Input Multiplexers
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Fabricante Electrónico  INTERSIL [Intersil Corporation]
Página de inicio  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HCS157MS Datasheet(HTML) 1 Page - Intersil Corporation

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCS157DMSR
-55oC to +125oC
Intersil Class S Equivalent
16 Lead SBDIP
HCS157KMSR
-55oC to +125oC
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
HCS157D/Sample
+25oC
Sample
16 Lead SBDIP
HCS157K/Sample
+25oC
Sample
16 Lead Ceramic Flatpack
HCS157HMSR
+25oC
Die
Die
HCS157MS
Radiation Hardened
Quad 2-Input Multiplexers
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
S
1I0
1I1
1Y
2I0
2I1
GND
2Y
VCC
4I0
4I1
4Y
3I0
3I1
3Y
E
2
3
4
5
6
7
8
116
15
14
13
12
11
10
9
S
1I0
1I1
1Y
2I0
2I1
GND
2Y
VCC
4I0
4I1
4Y
3I0
3I1
3Y
E
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii
≤ 5µA at VOL, VOH
Description
The Intersil HCS157MS is a Radiation Hardened quad 2-input
multiplexers which select four bits of data from two sources under
the control of a common select input (S). The Enable input (E
NOT) is active low. When the enable pin is high all of the outputs
(1Y-4Y) are forced low regardless of all other input conditions.
Moving data from two groups of registers to four common output
busses is a common use of these devices. The state of the Select
input determines the particular register from which the data comes.
They can also be used as function generators.
The HCS157MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCS157MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
September 1995
Spec Number
518833
File Number
3561.1


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