Data Sheet

ADN2841

Rev. B | Page 11 of 16

DATA AND CLOCK INPUTS

Data and clock inputs are ac-coupled (10 nF recommended)

and terminated via a 100 Ω internal resistor between the DATAP

and DATAN pins and also between the CLKP and CLKN pins.

A high impedance circuit sets the common-mode voltage that

is designed to change over temperature. It is recommended that

ac coupling be used to eliminate the need for matching between

common-mode voltages.

ADN2841

R = 2.5kΩ, DATA

R = 3kΩ, CLK

TO FLIP-FLOPS

400µA TYP

DATAP

DATAN

R

50Ω

50Ω

Figure 9. AC Coupling of Data Inputs

CCBIAS

CCBIAS should be connected to the IBIAS pin if the laser diode

is connected to the ADN2841 using a capacitor. CCBIAS is a

current sink to GND.

AUTOMATIC LASER SHUTDOWN

The ADN2841 ALS pin allows compliance with ITU-T G.958

(11/94), Section 9.7. When ALS is logic high, both bias and

modulation currents are turned off.

Correct operation of ALS can be confirmed by the FAIL alarm

being raised when ALS is asserted. Note that this is the only

time that DEGRADE will be low while FAIL is high.

ALARM INTERFACES

A 30 kΩ internal pull-up resistor is used to pull the digital high

feature that allows the user to externally wire resistors in parallel

with the 30 kΩ pull-up resistors, thus enabling the user to inter-

POWER CONSUMPTION

The ADN2841 die temperature must be kept below 125°C. The

LFCSP when soldered on a 4-layer board. Both LFCSP packages

have an exposed pad and, therefore, must be soldered to the PCB

to achieve this thermal performance.

calculated.

ADN2841

PSET

ERSET

DATAP

DATAN

IDTONE

IMODP

IBIAS

IMPD

ADN2850

DAC1

DAC2

SDI

SDO

CLK

Tx

Rx

CLK

CS

CS

Figure 10. Application Using Optical Supervisor ADN2850 as a Dual, 10-Bit

Digital Potentiometer Using Thin Film Resistor Technology to Give Very Low

Temperature Coefficients