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ADSP-BF525C Datasheet(PDF) 8 Page - Analog Devices |
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ADSP-BF525C Datasheet(HTML) 8 Page - Analog Devices |
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8 / 36 page  Rev. A | Page 8 of 36 | March 2010 ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C Recording Mode The digital audio interface sends the ADC digital filter data to the ADCDAT output pin for recording. The ADCDAT data stream multiplexes the left- and right-channel audio data in the time domain. The ADCLRC clock signal separates left- and right-channel digital audio frames on the ADCDAT lines. The CODEC_BCLK signal clocks the digital audio data within the frames. The CODEC_BCLK signal is either an input or an output depending on whether the codec is in master or slave mode. During a recording operation, ADCDAT and ADCLRC must be synchronous to the CODEC_BCLK signal to avoid data corruption. Playback Mode The digital audio interface receives data on the DACDAT input pin for playback. The digital audio data stream on the DACDAT pin is time-domain-multiplexed left and right channel audio data. The DACLRC clock signal separates left and right channel digital audio frames on the DACDAT lines. The CODEC_BCLK signal clocks the digital audio data within the frames. The CODEC_BCLK signal is either an input or an output depending on whether the codec is in master or slave mode. During a playback operation, DACDAT and DACLRC must be synchronous to the CODEC_BCLK signal to avoid data corruption. Digital Audio Data Sampling Rate To accommodate a wide variety of commonly used DAC and ADC sampling rates, the codec allows for two modes of opera- tion, normal and USB, selected by the USB bit (Register R8, Bit D0). The sampling rate is generated as a fixed divider from the CODEC_MCLK signal. Because all audio processing references the CODEC_MCLK signal, corruption of this signal will corrupt the quality of the audio at the codec output. The ADCLRC/ ADCDAT/CODEC_BCLK or DACLRC/DACDAT/ CODEC_BCLK signals must be synchronized with CODEC_MCLK in the digital audio interface circuit. CODEC_MCLK must be faster or equal to the CODEC_BCLK frequency to guarantee that no data is lost during data synchro- nization. The CODEC_BCLK frequency should be greater than the sampling rate × word length × 2. Ensuring that the CODEC_BCLK frequency is greater than this, guarantees that all valid data bits are captured by the digital audio interface cir- cuitry. For example, if a 32 kHz digital audio sampling rate with a 32-bit word length is desired, CODEC_BCLK = 2.048 MHz. |
Número de pieza similar - ADSP-BF525C_15 |
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Descripción similar - ADSP-BF525C_15 |
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