UPD17717 datasheet(40/408 Pages) NEC

No. de pieza	UPD17717

Descripción Electrónicos	4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

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Fabricante Electrónico	NEC [NEC]

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µPD17717, 17718, 17719

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Table 4-1. Data Memory Manipulation Instructions

Function

Instruction

Operation

Add

ADD

ADDC

Subtract

SUB

SUBC

Logic

AND

OR

XOR

Compare

SKE

SKGE

SKLT

SKNE

Transfer

MOV

LD

ST

Judge

SKT

SKF

4.3 Data Memory Addressing

Figure 4-3 shows address specification of the data memory.

An address of the data memory is specified by a bank, row address, and column address.

A row address and a column address are directly specified by a data memory manipulation instruction.

However, a bank is specified by the contents of a bank register.

For the details of the bank register, refer to 5. SYSTEM REGISTER (SYSREG).

Figure 4-3. Address Specification of Data Memory

Data memory address

Bank register

Column address

Row address

Bank

b3

b2

b1

b0

b2

b1

b0

b3

b2

b1

b0

Instruction operand

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