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UPD703100-33 Datasheet(PDF) 93 Page - NEC |
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UPD703100-33 Datasheet(HTML) 93 Page - NEC |
93 / 126 page Preliminary Data Sheet U13995EJ1V0DS00 93 µµµµPD703100-33, 703100-40, 703101-33, 703102-33 (c) Write timing (high-speed page DRAM access, normal access: off-page) (2/2) TRPW TRHW T2 T1 TDAW TW T3 <56> <61> <57> <58> <59> <62> <76> <63> <64> <60> <77> <65> <67> <66> <71> <84> <25> <25> <24> <24> <85> <86> <87> CLKOUT (Output) A0 to A23 (Output) RASn (Output) UCAS (Output) LCAS (Output) WE (Output) OE (Output) D0 to D15 (I/O) WAIT (Input) Row address Column address Remarks 1. This is the timing for the following case (n = 0 to 3, xx = 00 to 03, 10 to 13). Number of waits due to the RPCxx bit of the DRCn register (TRPW): 1 Number of waits due to the RHCxx bit of the DRCn register (TRHW): 1 Number of waits due to the DACxx bit of the DRCn register (TDAW): 1 2. The broken lines indicate high impedance. 3. n = 0 to 7 |
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