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74LVC_LVCH16373A Datasheet(PDF) 9 Page - NXP Semiconductors |
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74LVC_LVCH16373A Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 17 page 74LVC_LVCH16373A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 8 — 6 January 2014 9 of 17 NXP Semiconductors 74LVC16373A; 74LVCH16373A 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state [1] Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively. [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. [4] CPD is used to determine the dynamic power dissipation (PD in W). PD =CPD VCC2 fi N+ (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching (C L VCC 2 f o) = sum of the outputs 11. Waveforms th hold time Dn to LE; see Figure 9 VCC = 1.65 V to 1.95 V 2.5 - - 2.5 - ns VCC = 2.3 V to 2.7 V 2.0 - - 2.0 - ns VCC = 2.7 V 0.9 - - 0.9 - ns VCC = 3.0 V to 3.6 V +0.9 1.0 - +0.9 - ns tsk(o) output skew time VCC = 3.0 V to 3.6 V [3] - - 1.0 - 1.5 ns CPD power dissipation capacitance per input; VI =GND to VCC [4] VCC = 1.65 V to 1.95 V - 10.8 - - - pF VCC = 2.3 V to 2.7 V - 13.0 - - - pF VCC = 3.0 V to 3.6 V - 15.0 - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10. Symbol Parameter Conditions Tamb = 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Input (Dn) to output (Qn) propagation delays Fig 7. Latch enable input (LE) pulse width, and the latch enable input to output (Qn) propagation delays mgu772 Dn input Qn output tPHL tPLH GND VI VM VM VM VOH VOL mgu773 LE input Qn output tPHL tPLH tW VM VM VOH VI GND VOL VM VM VM |
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Descripción similar - 74LVC_LVCH16373A_15 |
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