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74LVCH322244A Datasheet(PDF) 1 Page - NXP Semiconductors |
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74LVCH322244A Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 14 page 1. General description The 74LVCH322244A is a 32-bit non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs nOE. A HIGH on input nOE causes the outputs to assume a high-impedance OFF-state. The device is designed with 30 series termination resistors in both HIGH and LOW output stages to reduce line noise. To ensure the high-impedance state during power-up or power-down, input nOE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3 V or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level. 2. Features and benefits 5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption MULTIBYTE flow-through standard pin-out architecture Low inductance multiple power and ground pins for minimum noise and ground bounce Direct interface with TTL levels Integrated 30 termination resistors All data inputs have bus hold Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 Cto+85 C and 40 Cto+125 C 74LVCH322244A 32-bit buffer/line driver; 30 series termination resistors; 5 V tolerant input/output; 3-state Rev. 3 — 16 December 2011 Product data sheet |
Número de pieza similar - 74LVCH322244A_15 |
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Descripción similar - 74LVCH322244A_15 |
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