1.

General description

3.3 V. The device can be used as two 8-bit transceivers or one 16-bit transceiver.

Complimentary output enable (OEAB and OEBA) inputs are provided to control the

transceiver functions. Select control (SAB and SBA) inputs are provided to select whether

real-time or stored data is transferred. A LOW input level selects real-time data, and a

HIGH input level selects stored data. The circuitry used for select control eliminates the

typical decoding glitch that occurs in a multiplexer during the transition between stored

and real-time data.

Data on the A or B bus, or both, can be stored in the internal flip-flops by LOW-to-HIGH

transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the

select control or output enable inputs. When SAB and SBA are in real-time transfer mode,

it is possible to store data without using the internal D-type flip-flops by simultaneously

enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus,

when all other data sources to the two sets of bus lines are at high- impedance, each set

of bus lines remains at its last level configuration.

2.

Features

−32 mA

inputs

74LVT16652A

3.3 V 16-bit bus transceiver/register; 3-state

Rev. 03 — 12 January 2005

Product data sheet