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MAX6335 Datasheet(PDF) 4 Page - Maxim Integrated Products

No. de pieza MAX6335
Descripción Electrónicos  4-Pin, Ultra-Low-Voltage, Low-Power 關P Reset Circuits with Manual Reset
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Fabricante Electrónico  MAXIM [Maxim Integrated Products]
Página de inicio  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX6335 Datasheet(HTML) 4 Page - Maxim Integrated Products

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4-Pin, Ultra-Low-Voltage, Low-Power
µP Reset Circuits with Manual Reset
4
_______________________________________________________________________________________
Pin Description
GND
Ground
1
RESET
Active-Low Reset Output. RESET remains low while VCC is below the reset
threshold, or MR is asserted and for a reset timeout period (tRP) after VCC
rises above the reset threshold, or MR is deasserted. RESET on the
MAX6337 is open-drain.
2
RESET
Active-High Reset Output. RESET remains high while VCC is below the
reset threshold, or MR is asserted and for a reset timeout period (tRP) after
VCC rises above the reset threshold, or MR is deasserted. RESET also
asserts when MR is low.
NAME
FUNCTION
MAX6335
MAX6336
MAX6337
1
2
PIN
Applications Information
Manual-Reset Inputs
Many µP-based products require manual-reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts reset. Reset remains asserted while MR is low,
and for the reset active timeout period after MR returns
high. MR has an internal 20k
Ω pull-up resistor, so it can
be left unconnected if not used. Connect a normally
open momentary switch from MR to GND to create a
manual-reset function; external debounce circuitry is
not required.
Interfacing to µPs with
Bidirectional Reset Pins
Since the RESET output on the MAX6337 is open-drain,
this device interfaces easily with µPs that have bidirec-
tional reset pins, such as the Motorola 68HC11.
Connecting the µP supervisor’s RESET output directly
to the microcontroller’s (µC’s) RESET pin with a single
pull-up resistor allows either device to assert reset
(Figure 1).
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these devices
are relatively immune to short-duration, negative-going
VCC transients (glitches). The Typical Operating
Characteristics show the Maximum Transient Duration
vs. Reset Comparator Overdrive graph. The graph
shows the maximum pulse width that a negative-going
VCC transient may typically have without issuing a reset
signal. As the amplitude of the transient increases, the
maximum allowable pulse width decreases.
Ensuring a Valid Reset Output
down to VCC = 0
When VCC falls below 1V and approaches the minimum
operating voltage of 0.7V, push/pull-structured reset
sinking (or sourcing) capabilities decrease drastically.
High-impedance CMOS-logic inputs connected to the
RESET pin can drift to indeterminate voltages. This
does not present a problem in most cases, since most
µPs and circuitry do not operate at VCC below 1V. For
the MAX6336, where RESET must be valid down to 0,
adding a pull-down resistor between RESET and GND
removes stray leakage currents, holding RESET low
VCC
VCC
GND
MAX6337
RESET
MR
VCC
GND
RESET
INPUT
MOTOROLA
68HCXX
µP
Figure 1. Interfacing to µPs with Bidirectional Reset Pins
3
MR
3
Manual-Reset Input. A logic low on MR asserts reset. Reset remains
asserted as long as MR is low, and for the reset timeout period (tRP) after
MR goes high. Leave unconnected or connect to VCC if not used.
4
VCC
4
Supply Voltage (0.7V to 5.5V)


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