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BUK964R2-80E Datasheet(PDF) 6 Page - NXP Semiconductors |
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BUK964R2-80E Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 13 page NXP Semiconductors BUK964R2-80E N-channel TrenchMOS logic level FET BUK964R2-80E All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved Product data sheet 13 March 2014 6 / 13 Symbol Parameter Conditions Min Typ Max Unit QGD gate-drain charge - 37.5 - nC Ciss input capacitance - 12850 17130 pF Coss output capacitance - 850 1020 pF Crss reverse transfer capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; Fig. 15 - 420 580 pF td(on) turn-on delay time - 70 - ns tr rise time - 109 - ns td(off) turn-off delay time - 203 - ns tf fall time VDS = 60 V; RL = 2.4 Ω; VGS = 5 V; RG(ext) = 5 Ω - 115 - ns LD internal drain inductance from upper edge of drain mounting base to center of die - 2.5 - nH LS internal source inductance from source lead to source bonding pad - 7.5 - nH Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.77 1.2 V trr reverse recovery time - 61 - ns Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 25 V - 139 - nC 003aag358 0 50 100 150 200 0 0.5 1 1.5 2 VDS (V) ID (A) 2.5 2.4 VGS (V) = 2.6 2.7 2.8 2.9 3.0 4.0 10 Tj = 25 °C; tp = 300 μs Fig. 6. Output characteristics: drain current as a function of drain-source voltage; typical values 003aag363 0 2 4 6 8 10 0 2 4 6 8 10 VGS (V) RDSon (mΩ) Fig. 7. Drain-source on-state resistance as a function of gate-source voltage; typical values |
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Descripción similar - BUK964R2-80E_15 |
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