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DAC39J84IAAVR Datasheet(PDF) 7 Page - Texas Instruments

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No. de pieza DAC39J84IAAVR
Descripción Electrónicos  DAC39J84 Quad-Channel, 16-Bit, 2.8 GSPS, Digital-to-Analog Converter with 12.5 Gbps JESD204B Interface
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Fabricante Electrónico  TI [Texas Instruments]
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DAC39J84
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SLASE48A – NOVEMBER 2014 – REVISED JANUARY 2015
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
1000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC specification JESD22-
250
C101(2)
(1)
Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows
safe manufacturing with a standard ESD control process.
(2)
Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe
manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
MIN
NOM
MAX
UNIT
Recommended operating junction temperature(1)
105
°C
TJ
Maximum rated operating junction temperature
125
°C
TA
Recommended free-air temperature
-40
25
85
°C
(1)
Prolonged use at this junction temperature may increase the device failure-in-time (FIT) rate.
6.4 Thermal Information
DAC39J84
THERMAL METRICS(1)(2)
UNIT
AAV (144 PINS)
RθJA
Theta junction-to-ambient (still air)
31.4
RθJB
Theta junction-to-board
12.6
RθJC
Theta junction-to-case, top
1.8
°C/W
ψJT
Psi junction-to-top of package
0.2
ψJB
Psi junction-to-bottom of package
12
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2)
Air flow or heat sinking reduces
θJA and may be required for sustained operation at 85° and maximum operating conditions.
6.5 DC Electrical Characteristics
Typical values at TA = 25°C, full temperature range is TMIN = -40°C to TMAX = 85°C, nominal supplies, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
16
Bits
DC ACCURACY
DNL
Differential nonlinearity
±4
LSB
1 LSB = IOUTFS/2
16
INL
Integral nonlinearity
±6
LSB
ANALOG OUTPUT
Coarse gain linearity
±0.04
LSB
Offset error
Mid code offset
±0.001
%FSR
With external reference
±2
Gain error
%FSR
With internal reference
±2
Gain mismatch
With internal reference
±2
%FSR
Full scale output current
20
30
mA
Output compliance
–0.5
0.6
V
Output resistance
300
k
Ω
Output capacitance
5
pF
Copyright © 2014–2015, Texas Instruments Incorporated
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