ESD+

ESD+

8

7

6

5

4

3

2

1

9

20

21

22

23

24

25

26

27

19

DIN

SCLK

CSB

VIO

VGPIO

GND

GND

VDD

DOUT

GPIO7

DRDYB

DAP

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

LMP92018

SNAS514B – NOVEMBER 2011 – REVISED MAY 2013

www.ti.com

SPI INTERFACE

The microcontroller communicates with LMP92018 via a popular SPI interface. This interface provides the user

full access to all Data, Status and Control registers of the device.

Connection Diagram

Figure 1. 36-Pin WQFN (Top View)

See NJK0036A Package

PIN DESCRIPTIONS

Name

Pin

Function

ESD Structures

VDD

1

Supply rail

VGPIO

4

GPIO rail

VIO

5

SPI rail

GND

2, 3 14

Device Ground

Die Attach Pad. For best thermal

conductivity and best noise immunity

DAP

*

DAP should be soldered to the PCB pad

which is connected directly to circuit

common node (GND).

IN[7:0]

35:28

Analog input

4

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Product Folder Links: LMP92018