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LMV641 Datasheet(PDF) 3 Page - Texas Instruments |
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LMV641 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 27 page  LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 2.7V DC Electrical Characteristics (continued) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V + = 2.7V, V− = 0V, V O = VCM = V +/2, and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Min Typ Max Symbol Parameter Conditions Units (1) (2) (1) 94.5 105 2.7V ≤ V+ ≤ 10V, VCM = 0.5 92.5 PSRR Power Supply Rejection Ratio dB 94 100 2.7V ≤ V+ ≤ 12V, VCM = 0.5 92 Input Common-Mode Voltage CMRR ≥ 80 dB CMVR 0 1.8 V Range CMRR ≥ 68 dB 0.3V ≤ VO ≤ 2.4V, RL = 2 kΩ to V +/2 82 88 0.4V ≤ VO ≤ 2.3V, RL = 2 kΩ to V +/2 78 AVOL Large Signal Voltage Gain dB 0.3V ≤ VO ≤ 2.4V, RL = 10 kΩ to V +/2 86 98 0.4V ≤ VO ≤ 2.3V, RL = 10 kΩ to V +/2 82 42 58 RL = 2 kΩ to V +/2, V IN = 100 mV 68 Output Swing High 22 35 RL = 10 kΩ to V +/2, V IN = 100 mV 40 mV from VO rail 38 48 RL = 2 kΩ to V +/2, V IN = 100 mV 58 Output Swing Low 18 30 RL = 10 kΩ to V +/2, V IN = 100 mV 35 VIN_DIFF = 100 mV to Sourcing 22 Sourcing and Sinking Output IOUT mA VO = V +/2 (4) Current Sinking 25 138 170 IS Supply Current μA 220 AV = +1, VO = 1 VPP Rising (10% to 90%) 2.3 SR Slew Rate V/ μs Falling (90% to 10%) 1.6 GBW Gain Bandwidth Product 10 MHz en Input-Referred Voltage Noise f = 1 kHz 14 nV/ in Input-Referred Current Noise f = 1 kHz 0.15 pA/ THD Total Harmonic Distortion f = 1 kHz, AV = 2, RL = 2 kΩ 0.014 % (4) The part is not short circuit protected and is not recommended for operation with low resistive loads. Typical sourcing and sinking output current curves are provided in the Typical Performance Characteristics and should be consulted before designing for heavy loads. 10V DC Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TA = 25°C, V + = 10V, V− = 0V,V O = VCM = V +/2, and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ Max Units (1) (2) (1) 5 500 VOS Input Offset Voltage µV 750 TC VOS Input Offset Average Drift 0.1 μV/°C 70 90 IB Input Bias Current (3) nA 105 IOS Input Offset Current 0.7 5 nA 94 120 CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 9V dB 90 (1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using Statistical Quality Control (SQC) method. (2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. (3) Positive current corresponds to current flowing into the device. Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMV641 |
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