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SY10E016

SY100E016

Micrel, Inc.

M9999-032006

hbwhelp@micrel.com or (408) 955-1690

Pin

Function

Parallel Data (Preset) Inputs

Data outputs

CE

Count Enable Control Input

PE

Parallel Load Enable Control Input

MR

Master Reset

CLK

Clock

TC

Terminal Count Output

TCLD

TC-Load Control Input

s 700MHz min. count frequency

s 1000ps CLK to Q, TC

s Internal, gated TC feedback

s 8 bits wide

s Fully synchronous counting and TC generation

s Asynchronous Master Reset

s Fully compatible with industry standard 10KH,

100K I/O levels

s Internal 75K

s Fully compatible with Motorola MC10E/100E016

s Available in 28-pin PLCC package

The SY10/100E016 are high-speed synchronous,

presettable and cascadable 8-bit binary counters designed

for use in new, high-performance ECL systems. Architecture

and operation are the same as the Motorola MC10H016 in

the MECL 10KH family, extended to 8 bits, as shown in the

logic diagram.

The counters feature internal feedback of TC, gated by

the TCLD (terminal count load) pin. When TCLD is LOW,

the TC feedback is disabled and counting proceeds

continuously, with TC going LOW to indicate an all-HlGH

state. When TCLD is HIGH, the TC feedback causes the

counter to automatically reload upon TC = LOW, thus

functioning as a programmable counter.

8-BIT SYNCHRONOUS

BINARY UP COUNTER

SY10E016

SY100E016

FEATURES

DESCRIPTION

PIN NAMES

Rev.: G

Amendment: /0

Issue Date:

March 2006