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93LC66A-SN Datasheet(PDF) 6 Page - Microchip Technology |
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93LC66A-SN Datasheet(HTML) 6 Page - Microchip Technology |
6 / 12 page 93LC66A/B DS21209A-page 6 Preliminary © 1997 Microchip Technology Inc. 3.6 ERASE/WRITE Disable and Enable (EWDS/EWEN) The 93LC66A/B powers up in the ERASE/WRITE Dis- able (EWDS) state. All programming modes must be preceded by an ERASE/WRITE Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruc- tion is executed or Vcc is removed from the device. To protect against accidental data disturbance, the EWDS instruction can be used to disable all ERASE/WRITE functions and should follow all programming opera- tions. Execution of a READ instruction is independent of both the EWDS and EWEN instructions. 3.7 READ The READ instruction outputs the serial data of the addressed memory location on the DO pin. A dummy zero bit precedes the 8-bit (93LC66A) or 16-bit (93LC66B) output string. The output data bits will toggle on the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is possible when CS is held high. The memory data will automati- cally cycle to the next register and output sequentially. FIGURE 3-4: EWDS TIMING FIGURE 3-5: EWEN TIMING FIGURE 3-6: READ TIMING CS CLK DI 1 0 0 0 0 X ••• X TCSL 1 X CS CLK DI 0 0 1 1 X TCSL ••• CS CLK DI DO 1 1 0 An ••• A0 HIGH-Z 0 Dx ••• D0 Dx ••• D0 ••• Dx D0 |
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