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TC642EUA Datasheet(PDF) 5 Page - Microchip Technology |
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TC642EUA Datasheet(HTML) 5 Page - Microchip Technology |
5 / 28 page 2002 Microchip Technology Inc. DS21444C-page 5 TC642 3.0 DETAILED DESCRIPTION 3.1 PWM The PWM circuit consists of a ramp generator and threshold detector. The frequency of the PWM is deter- mined by the value of the capacitor connected to the CF input. A frequency of 30 Hz is recommended (CF = 1 µF). The PWM is also the time base for the Start-up Timer (see Section 3.4, “Start-Up Timer”). The PWM voltage control range is 1.25V to 2.65V (typical) for 0% to 100% output duty cycle. 3.2 FAULT Output The TC642 detects faults in two ways. First, pulses appearing at SENSE due to the PWM turning on are blanked, with the remaining pulses filtered by a missing pulse detector. If consecutive pulses are not detected for 32 PWM cycles ( ≅1 Sec if CF = 1 µF), the Diagnostic Timer is activated, and VOUT is driven high continuously for three PWM cycles ( ≅100 msec if CF = 1 µF). If a pulse is not detected within this window, the Start-up Timer is triggered (see Section 3.4). This should clear a transient fault condi- tion. If the missing pulse detector times out again, the PWM is stopped and FAULT goes low. When FAULT is activated due to this condition, the device is latched in shutdown mode and will remain off indefinitely. The TC642 may be configured to continuously attempt fan restarts, if so desired. Continuous restart mode is enabled by connecting the FAULT output to VMIN through a 0.01 µF capacitor, as shown in Figure 3-1. When connected in this manner, the TC642 automatically attempts to restart the fan every time a fault condition occurs. When the FAULT output is driven low, the VMIN input is momentarily pulled below VSHDN, initiating a reset and clearing the fault condition. Normal fan start-up is then attempted as previously described. The FAULT output may be connected to external logic (or the interrupt input of a microcontroller) to shut the TC642 down if multiple fault pulses are detected at approximately one second intervals. Diode D1, capacitor C1 and resistors R5 and R6 are provided to ensure fan restarts are the result of a fan fault and not an over-temperature fault. A CMOS logic OR gate may be substituted for these components, if available. FIGURE 3-1: Fan Fault Output Circuit. Note: At this point, action must be taken to restart the fan by momentarily pulling VMIN below VSHDN, or cycling system power. In either case, the fan cannot remain disabled due to a fault condition, as severe system dam- age could result. If the fan cannot be restarted, the system should be shut down. FAULT SENSE R3 R1 R5 10k Ω D1 R4 GND From System Shutdown Controller (Optional) *The parallel combination of R3 and R4 must be >10 kΩ. Q1 +12V +5V VDD VIN VMIN VOUT RBASE R6 1k Ω VDD RSENSE CSENSE CF 1 µF CF TC642 Fan CB 0.01 µF 1 8 6 7 5 4 2 3 From Temp Sensor +5V 0.01 µF 1 0 TC642 RESET Fault Detected C1 Q2 |
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